JESD51-8
Abstract: JESD51-2 JEDEC JESD51-8 qfn 44 PACKAGE footprint 9mm surface mount package dimensions FREESCALE PACKING jesd51 8 JEDEC-STD-020 JEDEC-STD020 tqfp 44 PACKAGE footprint
Text: Freescale Semiconductor, Inc. ANALOG ICs INTEGRATED SOLUTIONS Freescale Semiconductor, Inc. PACKAGING Robust packaging is a key technology component of Analog Products. Motorola puts solutions together in single packages to accomodate power and high voltages.
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BR1568/D
JESD51-8
JESD51-2
JEDEC JESD51-8
qfn 44 PACKAGE footprint 9mm
surface mount package dimensions
FREESCALE PACKING
jesd51 8
JEDEC-STD-020
JEDEC-STD020
tqfp 44 PACKAGE footprint
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Untitled
Abstract: No abstract text available
Text: ICS843S050DI-02 FEMTOCLOCKS CRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER GENERAL DESCRIPTION FEATURES The ICS843S050DI-02 is a 10 output 3.3V LVPECL ICS Synthesizer optimized to generate micro-processor HiPerClockS™ reference clock frequencies and is a member of the
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ICS843S050DI-02
ICS843S050DI-02
25MHz
100MHz,
33MHz,
66MHz,
175MHz,
200MHz.
48-pin
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DA472
Abstract: No abstract text available
Text: PRELIMINARY TECHNICAL DATA a 12-Bit, 170 MSPS 3.3V A/D Converter Preliminary Technical Data AD9430 FEATURES SNR = 66dB @ Fin up to 65MHz at 170Msps ENOB of 10.3 @ Fin up to 65MHz at 170 Msps -1dBFs SFDR = -80dBc @ Fin up to 65MHz at 170Msps (1dBFs) Excellent Linearity:
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65MHz
170Msps
-80dBc
170Msps
AD9430
32C/W
DA472
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MPS 0633
Abstract: mps 0646
Text: Crystal-to-LVDS Clock Synthesizer ICS844625I DATA SHEET General Description Features The ICS844625I is a high frequency clock generator. The ICS844625I uses an external 25MHz crystal to synthesize 312.5MHz, 156.25MHz and 125MHz clocks. The ICS844625I has excellent cycle-to-cycle and RMS period jitter performance.
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ICS844625I
ICS844625I
25MHz
125MHz
48-lead
MPS 0633
mps 0646
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ICS873996AY
Abstract: ICS873996AYT VCO 10G ICS873996 48-PIN ICS873996AYLF ICS873996AYLFT MS-026 TQFP 80 slug up top Nippon capacitors
Text: ICS873996 DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY/MULTIPLIER/DIVIDER GENERAL DESCRIPTION FEATURES The ICS873996 is a Zero Delay/Multiplier/Divider ICS with hitless input clock switching capability and a HiPerClockS member of the HiPerClockS™ family of low jitter/
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ICS873996
ICS873996
ICS873996AY
ICS873996AYT
VCO 10G
48-PIN
ICS873996AYLF
ICS873996AYLFT
MS-026
TQFP 80 slug up top
Nippon capacitors
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DIP10
Abstract: DIP12 GD16523 GD16523-100BA
Text: 2.5 Gbit/s 16:1 Multiplexer GD16523 an Intel company Preliminary General Information Features The GD16523 is a multirate STM 1/4/16 plus 1.25 Gbit/s bit-rates 16:1 re-timing multiplexer with jitter clean-up capability. The VCXO reference clock input is differential and the frequency is selectable
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GD16523
GD16523
DIP10
DIP12
GD16523-100BA
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DIP10
Abstract: DIP12 GD16523
Text: an Intel company 2.5 Gbit/s 16:1 Multiplexer GD16523 General Information Features The GD16523 is a multirate STM 1/4/16 plus 1.25 Gbit/s bit-rates 16:1 re-timing multiplexer with jitter clean-up capability. The VCXO reference clock input is differential and the frequency is selectable
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GD16523
GD16523
DIP10
DIP12
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Untitled
Abstract: No abstract text available
Text: 2.5 Gbit/s 16:1 Multiplexer GD16523 Preliminary General Information Features The GD16523 multiplexes sixteen data inputs into a single data output, the bit rates of the inputs are selectable see table below . The data inputs are forward clocked by the differential input (DCLKP / DCLKN).
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GD16523
GD16523
DK-2740
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ICS873995
Abstract: 48-PIN ICS873995AY MS-026 VCO 10G
Text: ICS873995 DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY/MULTIPLIER/DIVIDER GENERAL DESCRIPTION FEATURES The ICS873995 is a Zero Delay/Multiplier/Divider ICS with hitless input clock switching capability and a HiPerClockS member of the HiPerClockS™ family of low jitter/
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ICS873995
ICS873995
48-PIN
ICS873995AY
MS-026
VCO 10G
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ICS813076I
Abstract: 30.72mhz 72MHZ HC49 ICS813076CYI ICS813076I-02 ICS813076I-30 ICS813076I-31 ICS814075I MS-026
Text: ICS813076I FREQUENCY GENERATOR/JITTER ATTENUATION DEVICE FOR WIRELESS INFRASTRUCTURE APPLICATIONS GENERAL DESCRIPTION FEATURES The ICS813076I is a member of the HiperClocks ICS family of high performance clock solutions from IDT. HiPerClockS The ICS813076I a PLL based synchronous clock
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ICS813076I
ICS813076I
30.72mhz
72MHZ
HC49
ICS813076CYI
ICS813076I-02
ICS813076I-30
ICS813076I-31
ICS814075I
MS-026
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ICS853S6111I
Abstract: 8133A ICS853S
Text: Low Voltage, 1-to-10, Differential-to- 2.5V, 3.3V LVPECL/ECL Fanout Buffer ICS853S6111I DATA SHEET Product Discontinuance Notice – Last Time Buy Expires on 1/31/2014 General Description Features The ICS853S6111I is a low skew 1-to-10 Differential Fanout Buffer,
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1-to-10,
ICS853S6111I
ICS853S6111I
1-to-10
8133A
ICS853S
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FAGD16524100BA
Abstract: DO15 GD16524 STM16 STM-16 intel 7882
Text: 2.5 Gbit/s Clock and Data Recovery and 1:16 DeMUX GD16524 an Intel company General Description Features The CDR contains all circuits needed for reliable acquisition and lock of the VCO phase to the incoming data-stream. The electrical input sensitivity is better
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GD16524
GD16524
STM-16
OC-48
FAGD16524100BA
DO15
STM16
intel 7882
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intel 7882
Abstract: 31 anl DO15 GD16524 STM16 STM-16
Text: 2.5 Gbit/s Clock and Data Recovery and 1:16 DeMUX GD16524 an Intel company General Description Features The CDR contains all circuits needed for reliable acquisition and lock of the VCO phase to the incoming data-stream. The electrical input sensitivity is better
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GD16524
GD16524
STM-16
OC-48
intel 7882
31 anl
DO15
STM16
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intel 7882
Abstract: DO15 GD16524 STM16 STM-16 GD16524-100BA
Text: 2.5 Gbit/s Clock and Data Recovery and 1:16 DeMUX GD16524 an Intel company Preliminary General Description Features The CDR contains all circuits needed for reliable acquisition and lock of the VCO phase to the incoming data-stream. The electrical input sensitivity is better
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GD16524
GD16524
STM-16
OC-48
intel 7882
DO15
STM16
GD16524-100BA
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Untitled
Abstract: No abstract text available
Text: 19-2688; Rev 0; 1/03 Differential 8:1 ECL/PECL Multiplexer with Dual Output Buffers Features ♦ 310ps Propagation Delay Three single-ended select inputs, SEL0, SEL1, and SEL2, control the mux function. The mux select inputs are compatible with ECL/PECL logic, and are internally referenced to the on-chip reference output VBB1, VBB2 ,
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310ps
MO220.
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100 p39
Abstract: FOOTPRINT TAJD 170/200MSPS outline of the heat slug for JEDEC AD9411 AD9430 TQFP-100 AD8351
Text: 10-Bit, 170/200 MSPS 3.3 V A/D Converter AD9411 FEATURES FUNCTIONAL BLOCK DIAGRAM SENSE VREF AGND DRGND DRVDD AVDD SCALABLE REFERENCE VIN+ VIN– CLK+ CLK– TRACK AND HOLD AD9411 ADC 10 10-BIT PIPELINE / CORE CLOCK MANAGEMENT LVDS OUTPUTS LVDS TIMING DATA,
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10-Bit,
AD9411
10-BIT
100-Lead
SV-100)
AD9411BSV-170
AD9411BSV-200
AD9411/PCB
SV-100
100 p39
FOOTPRINT TAJD
170/200MSPS
outline of the heat slug for JEDEC
AD9411
AD9430
TQFP-100
AD8351
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Untitled
Abstract: No abstract text available
Text: Supertex inc. MD3872 Low Power, Low Noise Ultrasound Receive Front-End Eight-Channels of LNA, VGA, AAF, CPS & 12-Bit, 50MHz ADCs Features ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►►
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MD3872
12-Bit,
50MHz
14dB/18dB
480mVPP/300mVPP
-47dB
15MHz)
ANSI-644
DSFP-MD3872
A022513
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tf2d
Abstract: MD3872 SWLNA CW8A
Text: Supertex inc. MD3872 Low Power, Low Noise Ultrasound Receive Front-End Eight-Channels of LNA, VGA, AAF, CPS & 12-Bit, 50MHz ADCs Features ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►► ►►
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MD3872
12-Bit,
50MHz
14dB/18dB
480mVPP/300mVPP
-47dB
15MHz)
ANSI-644
DSFP-MD3872
NR100912
tf2d
MD3872
SWLNA
CW8A
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pdp scan driver
Abstract: schematic diagram 12v power supply STV7619DU TQFP100 TBD180 STB 34
Text: STV7619DU Scan Driver for Plasma Display Panels Main Features • 64-output Scan Driver ■ 120 V Absolute Maximum Supply ■ 5 V Logic Supply ■ Optional 12 V Supply for driving the output stage ■ 150mA/1A Source/Sink Output ■ 1 A Source/Sink Output Diode
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STV7619DU
64-output
150mA/1A
64-bit
100-pin
TQFP100
STV7619D
STV7619
64-bit
pdp scan driver
schematic diagram 12v power supply
STV7619DU
TQFP100
TBD180
STB 34
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Untitled
Abstract: No abstract text available
Text: FemtoClock Multi-Rate 3.3V LVPECL Frequency Synthesizer ICS843034I-06 DATA SHEET GENERAL DESCRIPTION FEATURES The ICS843034I-06 is a general purpose, low phase ICS noise LVPECL synthesizer which can generate HiPerClockS™ frequencies for a wide variety of applications. The
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ICS843034I-06
ICS843034I-06
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D2863-77
Abstract: Plastic Encapsulate Diodes bond wire copper hermetic packages PCB land circuit for wind mill footprint plcc 208 cmos methane SENSOR land pattern PQFP 208
Text: GENERAL INFORMATION Packages INTRODUCTION P lastic surface-mount package designs were developed in the late 1970s in answer to the demand for costeffective solutions to achieving greater board density without sacriÞcing reliability or functionality. Recent developments in these
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1970s
D2863-77
Plastic Encapsulate Diodes
bond wire copper
hermetic packages PCB land
circuit for wind mill
footprint plcc 208
cmos methane SENSOR
land pattern PQFP 208
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ICS841N151-01
Abstract: ICS841N151BY-01 TQFP-EPAD-48 m 9583 transistor m 9583 2.4ghz synthesizer
Text: FemtoClock Crystal-to-HCSL/LVPECL Frequency Synthesizer ICS841N151-01 DATA SHEET General Description Features The ICS841N151-01 is an 8 output 3.3V HCSL Synthesizer optimized to generate micro-processor reference clock frequencies. Using a 25MHz parallel resonant crystal, the following frequencies
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ICS841N151-01
ICS841N151-01
25MHz
100MHz,
125MHz,
33MHz,
150MHz,
25MHz,
67MHz
200MHz.
ICS841N151BY-01
TQFP-EPAD-48
m 9583 transistor
m 9583
2.4ghz synthesizer
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Untitled
Abstract: No abstract text available
Text: Preliminary Technical Data 14-Bit, 105/125 MSPS, A/D Converters AD9445 FEATURES 125 MSPS guaranteed sampling rate AD9445BSV-125 100 dB two-tone SFDR with 30 MHz and 31 MHz 73.5 dB SNR with 70 MHz input 88 dBc SFDR with 225 MHz input Excellent linearity DNL = ±0.25 LSB typical
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AD9445BSV-125)
ANSI-644
14-Bit,
AD9445
100-LEAD
SV-100-1)
AD9445BSVZ-1251
AD9445BSVZ-1051
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Untitled
Abstract: No abstract text available
Text: 19-2543; Rev 0; 7/02 Dual 1:5 Differential Clock Drivers with LVPECL Inputs and LVDS Outputs Features The MAX9317/MAX9317A/MAX9317B/MAX9317C lowskew, dual 1-to-5 differential drivers are designed for clock and data distribution. The differential input is reproduced at five LVDS outputs with a low output-tooutput skew of 5ps.
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MAX9317/MAX9317A/MAX9317B/MAX9317C
145ps
330ps
MAX9317/MAX9317A
MAX9317B/MAX9317C
MAX9317A/MAX9317C
32L/48L
MAX9317/MAX9317A/MAX9317B/MAX9317C
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