apar c06 100 104
Abstract: No abstract text available
Text: BACK DS1MX7 Device DS1 Mapper 7-Channel TXC-04201B DATA SHEET DESCRIPTION FEATURES • Seven independent 1.544 Mbit/s DS1 mappers • Single byte-parallel Telecom Bus @ 6.48 MHz 28 Slots or 19.44 MHz (84 Slots) • Floating VT1.5 Byte Synchronous mapping for
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TXC-04201B
TU-11
5/TU-11
TXC-04201B-MB
apar c06 100 104
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AADD
Abstract: XPS-AS GR-253-CORE GR253-CORE GR-499-CORE FPS-310 sot 23 mark AD
Text: DS1MX7 Device DS1 Mapper 7-Channel TXC-04201B DATA SHEET DESCRIPTION FEATURES • Seven independent 1.544 Mbit/s DS1 mappers • Single byte-parallel Telecom Bus @ 6.48 MHz 28 Slots or 19.44 MHz (84 Slots) • Floating VT1.5 Byte Synchronous mapping for
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TXC-04201B
TU-11
5/TU-11
TXC-04201B-MB
AADD
XPS-AS
GR-253-CORE
GR253-CORE
GR-499-CORE
FPS-310
sot 23 mark AD
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tsm04
Abstract: 100BASE-FX ML6695 rsm capacitor rxc 151
Text: December 1998 PRELIMINARY ML6695 100BASE-X Fiber Physical Layer With 5-bit Interface GENERAL DESCRIPTION FEATURES The ML6695 implements the physical layer of the Fast Ethernet 100BASE-X standard for fiber media. The device provides the 5-bit or symbol interface for interface to
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ML6695
100BASE-X
ML6695
100BASE-FX
100BASE-SX
125MHz
tsm04
rsm capacitor
rxc 151
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PDF
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TCFR10
Abstract: 44-PIN MC68836 ML6673 ML6691 MDIO MDC
Text: March 1997 ML6691* 100BASE-T MII-to-PMD Transceiver GENERAL DESCRIPTION FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 100BASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/ decoder, a Stream Cipher scrambler/descrambler, and
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ML6691*
100BASE-T
ML6691
100BASE-T
100BASE-X
100BASE-TX
TCFR10
44-PIN
MC68836
ML6673
MDIO MDC
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Untitled
Abstract: No abstract text available
Text: MAX14821 IO-Link Device Transceiver General Description The MAX14821 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface
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MAX14821
MAX14821
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MAX14820
Abstract: IO-Link ILDO33 max17501 SDC36C PLDO33
Text: 19-5787; Rev 5; 7/12 EVALUATION KIT AVAILABLE MAX14820 IO-Link Device Transceiver General Description Features The MAX14820 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface
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MAX14820
IO-Link
ILDO33
max17501
SDC36C
PLDO33
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Untitled
Abstract: No abstract text available
Text: EVALUATION KIT AVAILABLE MAX14820 IO-Link Device Transceiver General Description The MAX14820 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface
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MAX14820
MAX14820
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Untitled
Abstract: No abstract text available
Text: March 1997 ML6691 100BASE-T MII-to-PMD Transceiver GENERAL DESCRIPTION FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 100BASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/ decoder, a Stream Cipher scrambler/descrambler, and
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ML6691
100BASE-T
ML6691
100BASE-T
100BASE-X
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Untitled
Abstract: No abstract text available
Text: 19-5916; Rev 2; 7/12 MAX14821 IO-Link Device Transceiver General Description Features The MAX14821 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface
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MAX14821
MAX14821
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ST6129
Abstract: XCMP100
Text: May 1997 ML6694 100BASE-TX Physical Layer with 5-Bit Interface GENERAL DESCRIPTION FEATURES The ML6694 is a high-speed physical layer transceiver that provides a 5-bit or symbol interface to unshielded twisted pair cable media. The ML6694 is well suited for
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ML6694
100BASE-TX
125MHz
MLT-3/10BASE-T
X3T12
ST6129
XCMP100
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XCMP100
Abstract: RSM09 mlt resistor ITD-10 ML6698 MX98713 TXC 8W bel TRANSFORMER ST6129
Text: May 1997 ML6698* 100BASE-TX Physical Layer with 5-Bit Interface GENERAL DESCRIPTION FEATURES The ML6698 is a high-speed physical layer transceiver that provides a 5-bit or symbol interface to unshielded twisted pair cable media. The ML6698 is well suited for
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ML6698*
100BASE-TX
ML6698
MX98713,
X3T12
10BASE-T/100BASE-TX
XCMP100
RSM09
mlt resistor
ITD-10
MX98713
TXC 8W
bel TRANSFORMER
ST6129
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PDF
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Untitled
Abstract: No abstract text available
Text: 19-5916; Rev 2; 7/12 MAX14821 IO-Link Device Transceiver General Description Features The MAX14821 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface
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MAX14821
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Untitled
Abstract: No abstract text available
Text: 19-5916; Rev 2; 7/12 MAX14821 IO-Link Device Transceiver General Description Features The MAX14821 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface
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MAX14821
MAX14821
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rxc 151
Abstract: 100Base-FX
Text: December 1998 PRELIMINARY ML6695 100BASE-X Fiber Physical Layer With 5-bit Interface GENERAL DESCRIPTION FEATURES The ML6695 implements the physical layer of the Fast Ethernet 100BASE-X standard for fiber media. The device provides the 5-bit or symbol interface for interface to
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ML6695
100BASE-X
125MHz
100BASE-FX
1300nm
rxc 151
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MLT 22 50
Abstract: mlt resistor ML6694 nrzi circuit diagram MLT-3 XCMP100 h441
Text: May 1997 ML6694* 100BASE-TX Physical Layer with 5-Bit Interface GENERAL DESCRIPTION FEATURES The ML6694 is a high-speed physical layer transceiver that provides a 5-bit or symbol interface to unshielded twisted pair cable media. The ML6694 is well suited for
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ML6694*
100BASE-TX
ML6694
125MHz
MLT-3/10BASE-T
X3T12
MLT 22 50
mlt resistor
nrzi circuit diagram MLT-3
XCMP100
h441
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PDF
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Untitled
Abstract: No abstract text available
Text: 19-5787; Rev 5; 7/12 EVALUATION KIT AVAILABLE MAX14820 IO-Link Device Transceiver General Description Features The MAX14820 transceiver is suitable for IO-Link devices and 24V binary sensors/actuators. All specified IO-Link data rates are supported. In IO-Link applications, the transceiver acts as the physical layer interface
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MAX14820
MAX14820
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PDF
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Untitled
Abstract: No abstract text available
Text: tmän S w it c h „ DS1MX7 Device DS1 Mapper 7-Channel TXC-04201B x- DATA SHEET DESCRIPTION FEATURES • Seven independent 1.544 Mbit/s DS1 mappers • Single byte-parallel Telecom Bus @ 6.48 MHz 28 Slots or 19.44 MHz (84 Slots) • Floating V T1.5 Byte Synchronous mapping for
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TXC-04201B
TU-11
5/TU-11
TXC-04201
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but16
Abstract: physical layer interface
Text: PR ELIM INA R Y f y P E R I C O M PI2C3020 .
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PI2C3020
48-pin
240-mil
300-mil
PS7036A
but16
physical layer interface
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TIL112
Abstract: BUT16
Text: PRELIMINARY Token Ring Active Retiming Hub Interface Chip Product Features: • Constant gain digital PLLs for data retiming • Complete physical layer interface for 4/16 Mbps Token Ring Concentrator • Phantom voltage detection/generation for lobe port
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PS7035A
TIL112
BUT16
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PDF
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ME6691
Abstract: No abstract text available
Text: March 1997 % M i c r o Linear ML6691 100BASE-T M II-to-PM D Transceiver GENERAL DESCRIPTION FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 1OOBASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/
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ML6691
100BASE-T
ML6691
10OBASE-X
100BASE-TX
408/432-02957C
ME6691
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rsm ah 16
Abstract: 0224a ic Accessible Local code
Text: mÉL Micro June 1995 PRELIMINARY Linear ML6691 100BASE-T MII-to-PMD Transceiver G EN ERA L D ESCR IPTIO N FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 100BASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/
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ML6691
100BASE-T
ML6691
100BASE-X
100BASE-TX
rsm ah 16
0224a
ic Accessible Local code
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PDF
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RX-4M
Abstract: physical layer interface BUT16
Text: PRELIMINARY fu P E R IC O M Token Ring Physical Layer Interface Chip Product Features • Complete DTR/STR physical layer interface for 4/16 M bps Token Ring application for UTP/STP
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48-pin
240-mil
300-mil
PS7036A
RX-4M
physical layer interface
BUT16
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PDF
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Untitled
Abstract: No abstract text available
Text: June 1995 PRELIMINARY ^ÉkMicro Linear ML6691 100BASE-T MIl-to-PMD Transceiver GENERAL DESCRIPTION FEATURES The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 10OBASE-T standard. Functions contained in the ML6691 include a 4B/5B encoder/
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ML6691
100BASE-T
ML6691
10OBASE-T
10OBASE-T
100BASE-T
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10BASE-T
Abstract: TSM 30 CK 1200
Text: M ay 1997 % M ic r o Linear ML6698 100BASE-TX Physical Layer with 5-Bit Interface GENERAL DESCRIPTION FEATURES The ML6698 is a high-speed physical layer transceiver that provides a 5-bit or symbol interface to unshielded twisted pair cable media. The ML6698 is well suited for
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ML6698
MX9871
10OBASE-TX
125MHz
ML6698
100BASE-TX
10BASE-T
TSM 30 CK 1200
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PDF
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