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    PE-65507

    Abstract: PE-65508 65508 A101 PE-65506 PE-65506T PE-65510 RG-179 rg6 coax 6550-7
    Text: FIBRE CHANNEL DUAL TRANSFORMERS For Use with 75 Ω Coaxial or 150 Ω STP Cable Designed for fast rise time and low baseline wander IC grade transfer-molded package withstands 235°C IR reflow Pick & Place compatible Electrical Specifications @ 25°C — Operating Temperature 0°C to 70°C


    Original     		PE-65506 PE-65507 PE-65508 PE-65510 PE-65507 PE-65508 65508 A101 PE-65506 PE-65506T PE-65510 RG-179 rg6 coax 6550-7 PDF

    AN 7104

    Abstract: 7104
    Text: FIBRE CHANNEL Dual Transformer 7101-7104 • Designed for use with 75Ω Coaxial or 150Ω STP Cable • Fast rise time and low baseline wander MECHANICAL AND SCHEMATIC All dimensions in inches SUGGESTED PAD LAYOUT SCHEMATIC SELECTION TABLE Baud Rate Coax Cable STP Cable


    Original     		PDF

    Enterprise 1500

    Abstract: No abstract text available
    Text: BOTHHAND FIBRE CHANNEL DUAL TRANSFORMERS Enterprise Inc. Page 1 of 1 ! Designed for fast rise time and low baseline wander. ! 16 PIN surface mountable. ! Frequency Range 2MHz to 266MHz. ! Designed for FDDI & application. ! Operating temperature range: 0℃ to +70℃.


    Original     		266MHz. TS-WT75 TS-WT76 TS-WT150 Enterprise 1500 PDF

    HI-POT

    Abstract: electronic transformer Transformer a10705
    Text: FIBRE CHANNEL DUAL TRANSFORMER P/N: S5508M DATA SHEET Page : 1/ 1 Feature l l l l l For Use with 75O Coaxial Cable. Designed for fast rise time and low baseline wander. Pick &Place compatible. Operating temperature range: -40°C to +85°C. Storage temperature range: -40℃ to +125℃.


    Original     		S5508M S5508M HI-POT electronic transformer Transformer a10705 PDF

    LXT6251A

    Abstract: LXT6051 LXT6234 LXT6282 muldex G703 LXT380 TU12 6251A LXT625
    Text: product brief Intel LXT6282 Digital Interface Product Description The Intel® LXT6282 digital interface is the telecommunication industry’s first octal E1 digital interface. It is the only solution to simultaneously address the widespread problems of jitter, wander,


    Original     		LXT6282 USA/1100/1K/MG/DC LXT6251A LXT6051 LXT6234 muldex G703 LXT380 TU12 6251A LXT625 PDF

    MK2049-45ASILFTR

    Abstract: ETS300 GR-1244 MAN05 MK2049-34 MK2049-36 MK2049-45A MT9045 TR62411 vcxo 2048 khz
    Text: DATASHEET MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input


    Original     		MK2049-45A MK2049-45A 20-pin TR62411, ETS300 GR-1244 MK2049-45ASILFTR GR-1244 MAN05 MK2049-34 MK2049-36 MT9045 TR62411 vcxo 2048 khz PDF

    EIA-586-A

    Abstract: ADM5104 Beta Transformer Technology C3115 C31150 1000 watt ferrite transformer SD412
    Text: a Low Power Quad NRZ to Transformer Fast Ethernet 110Base-TX Transceiver ADM5104 FEATURES Four 100 TX to Match One Quad Transformer Compliant to 802.3u 110Base-TX Equalization and Base Line Wander Correction Low Power, Typ 300 mW per Channel Differential Transformer Interface for Transmit and


    Original     		110Base-TX ADM5104 110Base-TX ADM5104 80-Terminal ST-80) EIA-586-A Beta Transformer Technology C3115 C31150 1000 watt ferrite transformer SD412 PDF

    Untitled

    Abstract: No abstract text available
    Text: MK2049-45 3.3V Communications Clock PLL Description Features The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate


    Original     		MK2049-45 MK2049-45 50MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: MK2049-45 3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate


    Original     		MK2049-45 MK2049-45 50MHz PDF

    GR-1244-CORE

    Abstract: GR-253-CORE ZL30106 ZL30106QDG "network interface cards"
    Text: ZL30106 SONET/SDH/PDH Network Interface DPLL Data Sheet Features • • • • • • • • October 2004 Synchronizes to clock-and-sync-pair to maintain minimal phase skew between inputs and outputs Supports output wander and jitter generation specifications for SONET/SDH and PDH


    Original     		ZL30106 GR-1244-CORE GR-253-CORE ZL30106 ZL30106QDG "network interface cards" PDF

    Untitled

    Abstract: No abstract text available
    Text: DATASHEET MK2049-44 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-44 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input


    Original     		MK2049-44 50MHz 199707558G PDF

    Untitled

    Abstract: No abstract text available
    Text: 125 Series GPSDO Product Comparison Model Number Wi125 1PPS Holdover excludes aging Jitter (@10Hz) Voltage Temp Range Lock to External 1PPS Lock to External 10MHz Wander Generation Yes ≤ 600 PPB N/A 3.3 Vdc -30 to 80°C No No N/A FTS125-CTV Yes ≤ 600 PPB


    Original     		Wi125 10MHz FTS125-CTV -70dBc FTS125-COV FTS250 -90dBc PDF

    fc-638l

    Abstract: GTS FC-638L fc-638 FC638L 40ST1041AX H1164 RTL8208 100base AA100 AA111
    Text: RTL8208 REALTEK SINGLE CHIP OCTAL 10/100 MBPS FAST ETHERNET TRANSCEIVER RTL8208 7.4.2 Receive Function . 21 7.4.3 Link Monitor . 22 7.4.4 Baseline Wander Compensation . 23


    Original     		RTL8208 100Base-FX 14x20 530-ASS-P004 fc-638l GTS FC-638L fc-638 FC638L 40ST1041AX H1164 RTL8208 100base AA100 AA111 PDF

    GR-1244-CORE

    Abstract: BELLCORE GR-1244-CORE
    Text: SY0010 SYNCHRONOUS EQUIPMENT CLOCK STRATUM 3/3E The SY0010 is an accurate time and frequency source that has been designed as a module level subsystem. The SY0010 is an excellent synchronization solution for timing, jitter and wander topics, in compliance with telecommunication standards


    Original     		SY0010 SY0010 GR-1244-CORE. SY0001 SY0002 SY0005 76MHz GR-1244-core BELLCORE GR-1244-CORE PDF

    HFAN-9

    Abstract: KC 0898 HFAN-09
    Text: Application Note: HFAN-09.0.4 Rev.1; 04/08 NRZ Bandwidth – LF Cutoff and Baseline Wander Maxim Integrated Products NRZ Bandwidth – LF Cutoff and Baseline Wander 1 Introduction A fundamental goal when designing physical-layer digital communication systems is transmission of the


    Original     		HFAN-09 com/arpdf/AppNotes/1hfan901 HFAN-9 KC 0898 PDF

    transformer

    Abstract: TRANSFORMER CT surface mount S5871
    Text: T1/CEPT/DS3 DUAL SURFACE MOUNT TRANSFORMER P/N:S5871 DATA SHEET A. General Specifications: 1. Designed for fast rise time and low baseline wander 2. IC grade transformer-molded package with stands 235° C IR reflow 3. Pick & place compatible 4. Operating temperature range : 0°C to +70°C


    Original     		S5871 2Vrms/100KHz 2000Vrms transformer TRANSFORMER CT surface mount PDF

    pe-65508

    Abstract: PE-65508NL PE-65507 65508 65510 PE-65506 PE-65506T PE-65510 PE-65506NL pe65508nl
    Text: FIBRE CHANNEL DUAL TRANSFORMERS For Use with 75Ω Coaxial or 150Ω STP Cable Designed for fast rise time and low baseline wander IC grade transfer-molded package withstands 235°C IR reflow Pick & Place compatible Electrical Specifications @ 25°C — Operating Temperature 0°C to 70°C


    Original     		PE-65506 PE-65507 PE-65508 PE-65510 PE-65506NL PE-65507NL PE-65508NL PE-65510NL pe-65508 PE-65508NL PE-65507 65508 65510 PE-65506 PE-65506T PE-65510 PE-65506NL pe65508nl PDF

    TDS540

    Abstract: ML6673 nrzi circuit diagram MLT-3 pattern generator for eye TDS820 ML6673EVAL prbs generator Tektronix CSA90 prbs pattern generator
    Text: JULY 1995 Application Brief 3 ML6673 and Baseline Wander PROBLEM DEFINITION Broad acceptance of high performance networking protocols ¾ such as FDDI and Fast Ethernet ¾ will be eased by enabling the transmission of these protocols over the existing copper cable infrastructure. This application brief


    Original     		ML6673 TDS540 nrzi circuit diagram MLT-3 pattern generator for eye TDS820 ML6673EVAL prbs generator Tektronix CSA90 prbs pattern generator PDF

    L80225

    Abstract: HALO TG22-3506ND TG22-3506ND LINK100 ssd schematic l80225/b LSI L80225
    Text: L80225 10/100 MbpsTX/10BT Ethernet Physical Layer Device PHY Technical Manual Features • Single Chip 100Base-TX /10Base-T physical layer solution • On-chip wave shaping - no external filters required • Dual Speed - 10/100 Mbps • Baseline Wander Correction


    Original     		L80225 MbpsTX/10BT 100Base-TX /10Base-T MD400182/B HALO TG22-3506ND TG22-3506ND LINK100 ssd schematic l80225/b LSI L80225 PDF

    Digital Alarm Clock by ttl

    Abstract: Digital Alarm Clock on ttl G-737 M7418
    Text: SA2030 sames SA2030 PCM FRAME ALIGNER FEATURES n Frame Alignment Recovery and loss in accordance with CCITT recommendations G.732 and G.737 n Indication of Slip, loss of frame synchronisation, and loss of route clock conditions. n Jitter and phase-wander immunity


    Original     		SA2030 048MHz 50ppm. Digital Alarm Clock by ttl Digital Alarm Clock on ttl G-737 M7418 PDF

    ETS300

    Abstract: GR-1244 MAN05 MK2049-34 MK2049-36 MK2049-45A MK2069 MT9045 TR62411 crystal 27 MHz
    Text: DATASHEET MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input


    Original     		MK2049-45A MK2049-45A 20-pin TR62411, ETS300 GR-1244 GR-1244 MAN05 MK2049-34 MK2049-36 MK2069 MT9045 TR62411 crystal 27 MHz PDF

    LXT6234

    Abstract: LXT6282 E1 HDB3
    Text: Data Sheet MARCH 1999 Revision 2.0 LXT6282 Octal E1 Digital Interface with CRC-4 Monitoring and Jitter/Wander Suppression General Description Features LXT6282 is an eight-channel E1 digital interface. It integrates an E1 dejitter phase locked loop, an E1 retiming


    Original     		LXT6282 LXT6282 SXT6251 PDS-6282-R1 LXT6234 E1 HDB3 PDF

    Untitled

    Abstract: No abstract text available
    Text: DATASHEET MK2049-45A 3.3 VOLT COMMUNICATIONS CLOCK PLL Description Features The MK2049-45A is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate input


    Original     		MK2049-45A MK2049-45A 20-pin TR62411, ETS300 GR-1244 PDF

    Untitled

    Abstract: No abstract text available
    Text: MK2049-45 3.3V Communications Clock PLL Description The MK2049-45 is a dual Phase-Locked Loop PLL device which can provide frequency synthesis and jitter attenuation. The first PLL is VCXO based and uses a pullable crystal to track signal wander and attenuate


    Original     		MK2049-45 MK2049-45 50MHz PDF