This site uses third-party website tracking technologies to provide and continually improve our services, and to display advertisements according to users' interests. I agree and may revoke or change my consent at any time with effect for the future.
Features
General
· High-performance, Low-power secureAVR® Core RISC Architecture
· 135 Powerful Instructions (Most Executed in a Single Clock Cycle)
· Bond Pad Locations Conforming to ISO 7816-2