DSAAQ0030579.pdf by Cypress Semiconductor

Partial File Text CY7C1666KV18, CY7C1677KV18 CY7C1668KV18, CY7C1670KV18 144-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) 144-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Laten
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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3M Touch Systems CY7C1668KV18

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