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cP
IITSU
data sheet
July 1998 Revision 1.0
P D C 8 R V 7 2 8 4 B -( 1 0 3 / 10)T-S 64MByte (8M x 72) CMOS, PC/100 Synchronous DRAM Module - ECC (Registered)
General Description
The PDC8R
