NEC asu
Abstract: 13E3h 1442H
Text: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid
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R8C/22
R8C/23
REJ09B0251-0200
NEC asu
13E3h
1442H
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1037h
Abstract: 1250H 1488h MX12 MX23 PM5365
Text: PM5365 TEMAP STANDARD PRODUCT DATASHEET PMC-1991148 ISSUE 3 HIGH DENSITY VT/TU MAPPER AND M13 MULTIPLEXER PM5365 TEMAP VT/TU MAPPER AND M13 MULTIPLEXER DATA SHEET PROPRIETARY AND CONFIDENTIAL RELEASED ISSUE 3: SEPTEMBER 2001 Proprietary and Confidential to PMC-Sierra, Inc. and for its Customers’ Internal Use
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PM5365
PMC-1991148
PM5365
1037h
1250H
1488h
MX12
MX23
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Untitled
Abstract: No abstract text available
Text: PM8315 TEMUX STANDARD PRODUCT DATASHEET ISSUE 7 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MUX :5 4: 01 AM PMC-1981125 co n Fr id ay ,2 TEMUX 9O ct ob er ,2 00 4 10 PM8315 DATASHEET PROPRIETARY AND CONFIDENTIAL ISSUE 7: MAY 2001 Do wn lo
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PM8315
PMC-1981125
PM8315
PMC-19nd
PMC-1971268
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HTR resistors
Abstract: 80960 80960SA reference i960 RP Processor 80960JF STT 433 1250H clock generator in dual core processor i960 Cx Instruction Set Quick Reference i960 Cx Processor Instruction Set Quick Reference
Text: i960 RP Microprocessor User’s Manual i960® RP Microprocessor User’s Manual February 1996 Order Number: 272736-001 Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for
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Index-17
Index-18
HTR resistors
80960
80960SA reference
i960 RP Processor
80960JF
STT 433
1250H
clock generator in dual core processor
i960 Cx Instruction Set Quick Reference
i960 Cx Processor Instruction Set Quick Reference
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80960
Abstract: BO 620 bbc timer stt 11 c17f i960 Cx Processor Instruction Set Quick Reference i960RP 80960JF 80960RD 80960RP MA11
Text: i960 Rx I/O Microprocessor Developer’s Manual Release Date: April, 1997 Order Number: 272736-002 The i960® Rx I/O Processor may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Such errata are
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sa-26
Index-23
80960
BO 620
bbc timer stt 11
c17f
i960 Cx Processor Instruction Set Quick Reference
i960RP
80960JF
80960RD
80960RP
MA11
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13CD
Abstract: MA 1360H 13BFh 1344H R5F21226JFP R5F21226KFP R5F21227JFP R5F21227KFP 1421H 1447H
Text: PRELIMINARY Notice: This is not a final specification. Some parametric limits are subject to change. R8C/22, R8C/23 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER 1. REJ03B0097-0020 Rev.0.20 Sep 29, 2005 Overview This MCU is built using the high-performance silicon gate CMOS process using the R8C/Tiny Series CPU core and is
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R8C/22,
R8C/23
16-BIT
REJ03B0097-0020
48-pin
13CD
MA 1360H
13BFh
1344H
R5F21226JFP
R5F21226KFP
R5F21227JFP
R5F21227KFP
1421H
1447H
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1587H
Abstract: No abstract text available
Text: PM8315 TEMUX PRELIMINARY DATASHEET PMC-981125 ISSUE 4 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MUX PM8315 TEMUX HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MULTIPLEXER DATASHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY
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PMC-981125
PM8315
PM8315
PMC-981125
PMC-971268
1587H
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0B-09
Abstract: bip 109
Text: PM5365 TEMAP PRELIMINARY DATASHEET PMC-991148 ISSUE 1 VT/TU MAPPER AND M13 MUX PM5365 TEMAP VT/TU MAPPER AND M13 MULTIPLEXER DATASHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 1: SEPTEMBER 1999 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
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PMC-991148
PM5365
PM5365
PMC-991148
PMC-990691
0B-09
bip 109
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1N44H
Abstract: 1a5ah 1178H 1N60H 1171H 1A86H 0m02 1b7ah 19C1H 1N14H
Text: SONET/SDH Payload Extractor/Aligner SPECTRA-4x155 Production PM5316 SPECTRA 4x155 SONET/SDH Payload Extractor/Aligner 4 x 155 Mbit/s Datasheet Proprietary and Confidential Production Issue 4: March 2001 Proprietary and Confidential to PMC-Sierra, Inc. and for its customers’ internal use
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SPECTRA-4x155)
PM5316
4x155
PMC-1990822,
1n31h
PMC-1990822
1N44H
1a5ah
1178H
1N60H
1171H
1A86H
0m02
1b7ah
19C1H
1N14H
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a8293
Abstract: A8294 A8264 PC 1498H 1250H a8296 BA RV cb rv 1050H REQ64
Text: Intel 80312 I/O Companion Chip Developer’s Manual December 2000 Order Number: 273410-002 Intel® 80312 I/O Companion Chip Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual
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181CH
1820H
1824H
1828H
182CH
1830H
1834H
1838H
183CH
18FFH
a8293
A8294
A8264
PC 1498H
1250H
a8296
BA RV
cb rv
1050H
REQ64
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LB 124 d
Abstract: BH RV transistor i960 Cx Processor Instruction Set Quick Reference 80960JT 80960RM 80960RN REQ64 BIT3102 273160 80960
Text: i960 RM/RN I/O Processor Developer’s Manual July 1998 Order Number: 273158-001 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability
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80960RxJx
Index-11
LB 124 d
BH RV transistor
i960 Cx Processor Instruction Set Quick Reference
80960JT
80960RM
80960RN
REQ64
BIT3102
273160
80960
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doorbell circuit diagram
Abstract: doorbell application 1378h COMMAND REGISTER doorbell doorbell circuit application doorbells 0004H REQ64 1328H
Text: Messaging Unit 16 This chapter describes the Messaging Unit MU of the i960 RM/RN I/O Processor. The MU is closely related to the Primary Address Translation Unit (PATU) described in Chapter 15, “Address Translation Unit”. 16.1 Overview The Messaging Unit provides a mechanism for data to be transferred between the PCI system and
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1380H
000000H
doorbell circuit diagram
doorbell application
1378h
COMMAND REGISTER
doorbell
doorbell circuit application
doorbells
0004H
REQ64
1328H
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1312H
Abstract: 144BH 1458h 1351h 13D0H 1444H
Text: R8C/22 Group, R8C/23 Group RENESAS MCU 1. REJ03B0097-0100 Rev.1.00 Oct 27, 2006 Overview This MCU is built using the high-performance silicon gate CMOS process using the R8C/Tiny Series CPU core and is packaged in a 48-pin plastic molded LQFP. This MCU operates using sophisticated instructions featuring a high level
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R8C/22
R8C/23
REJ03B0097-0100
48-pin
1312H
144BH
1458h
1351h
13D0H
1444H
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SI 1340H
Abstract: 1542H mx-126 1488h integrators si 1340h PSL 26 SA8 357 T1E1-7 DATA SHEET Equivalent MX12 MX23
Text: PM5365 TEMAP STANDARD PRODUCT REGISTER DESCRIPTION PMC-1990682 ISSUE 2 HIGH DENSITY VT/TU MAPPER AND M13 MULTIPLEXER PM5365 TEMAP HIGH DENSITY VT/TU MAPPER AND M13 MULTIPLEXER REGISTER DESCRIPTION Proprietary and Confidential ISSUE 2: JULY 2001 PMC-Sierra, Inc.
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PM5365
PMC-1990682
PM5365
PMC-1990682
SI 1340H
1542H
mx-126
1488h
integrators si 1340h
PSL 26
SA8 357
T1E1-7 DATA SHEET Equivalent
MX12
MX23
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R5F2123
Abstract: R5F2123CKFP 131Bh R5F2122CJFP R5F21226DFP R5F21226JFP R5F21227DFP R5F21227JFP 1428H R5F21228JFP
Text: R8C/22 Group, R8C/23 Group RENESAS MCU 1. REJ03B0097-0110 Rev.1.10 Mar 16, 2007 Overview This MCU is built using the high-performance silicon gate CMOS process using the R8C/Tiny Series CPU core and is packaged in a 48-pin plastic molded LQFP. This MCU operates using sophisticated instructions featuring a high level
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R8C/22
R8C/23
REJ03B0097-0110
48-pin
R5F2123
R5F2123CKFP
131Bh
R5F2122CJFP
R5F21226DFP
R5F21226JFP
R5F21227DFP
R5F21227JFP
1428H
R5F21228JFP
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1587H
Abstract: sdh demapper 1035H-1037H 1037h 1250H 1488h MX12 MX23 PM5365 9811J
Text: PM5365 TEMAP STANDARD PRODUCT DATASHEET ISSUE 3 HIGH DENSITY VT/TU MAPPER AND M13 MULTIPLEXER 11 :3 2: 49 PM PMC-1991148 ,1 1J an ua ry ,2 00 3 PM5365 to n Sa tu rd ay TEMAP DATA SHEET PROPRIETARY AND CONFIDENTIAL RELEASED ISSUE 3: SEPTEMBER 2001 Do wn lo
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PM5365
PMC-1991148
PM5365
1587H
sdh demapper
1035H-1037H
1037h
1250H
1488h
MX12
MX23
9811J
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1C65H
Abstract: 1a5ah
Text: :5 6: 55 AM SPECTRA 4x155 ASSP Telecom Standard Product Data Sheet Released m be r, 20 05 12 PM5316 es da y, 13 De ce SPECTRA 4x155 Data Sheet Released Issue No. 6: November 2005 Do wn lo ad ed by Co nt e nt Te a m of P ar tm in er In co n Tu SONET/SDH Payload Extractor/Aligner
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4x155
PM5316
4x155
PMC-1990822,
1C65H
1a5ah
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8424h
Abstract: 1488h 1250H 103DH 1428H 1484H 1118H 8620H 1278H 8420H
Text: Memory-Mapped Registers C This chapter describes the memory-mapped registers for the integrated peripherals. C.1 Overview The Peripheral Memory-Mapped Register PMMR interface gives software the ability to read and modify internal control registers. Each register is accessed as a memory-mapped 32-bit register
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32-bit
1838H
1828H
183CH
18FFH
1810H
180CH
1710H
80960RM/RN
8424h
1488h
1250H
103DH
1428H
1484H
1118H
8620H
1278H
8420H
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r5f2122ckfp
Abstract: r5f21237jfp R5F21238KFP REJ09B0251-0200 R5F21236JFP R5F2123CKFP 1342H
Text: REJ09B0251-0200 16 R8C/22 Group, R8C/23 Group Hardware Manual RENESAS MCU R8C FAMILY / R8C/2x SERIES All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by
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REJ09B0251-0200
R8C/22
R8C/23
r5f2122ckfp
r5f21237jfp
R5F21238KFP
REJ09B0251-0200
R5F21236JFP
R5F2123CKFP
1342H
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Untitled
Abstract: No abstract text available
Text: PM5365 TEMAP PRELIMINARY DATASHEET PMC-1991148 ISSUE 2 VT/TU MAPPER AND M13 MUX PM5365 TEMAP VT/TU MAPPER AND M13 MULTIPLEXER DATASHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 2: FEBRUARY 2000 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
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PMC-1991148
PM5365
PM5365
PMC-1991148
PMC-990691
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SI 1360H
Abstract: 1542H 1488h 1558h PSL 26 MX12 MX23 PM8315 SI 1340H
Text: PM8315 TEMUX STANDARD PRODUCT REGISTER DESCRIPTIONS PMC-1990495 ISSUE 5 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MUX PM8315 TEMUX HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MULTIPLEXER REGISTER DESCRIPTIONS Proprietary and Confidential
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PM8315
PMC-1990495
PM8315
SI 1360H
1542H
1488h
1558h
PSL 26
MX12
MX23
SI 1340H
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NEC 1378h
Abstract: R5F2123CKFP 1347h 13F9H R5F21226DFP R5F21226JFP R5F2123 R5F21227JFP R5F21228DFP R5F21228JFP
Text: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid
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145AH
Abstract: MA 1360H 1320H 1378H ic r5f2122ckfp R5F2123CKFP 13C4H R5F2122AJFP R5F21226DFP R5F21227DFP
Text: R8C/22 Group, R8C/23 Group RENESAS MCU 1. REJ03B0097-0200 Rev.2.00 Aug 20, 2008 Overview This MCU is built using the high-performance silicon gate CMOS process using the R8C CPU core and is packaged in a 48-pin plastic molded LQFP. This MCU operates using sophisticated instructions featuring a high level of
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R8C/22
R8C/23
REJ03B0097-0200
48-pin
145AH
MA 1360H
1320H
1378H ic
r5f2122ckfp
R5F2123CKFP
13C4H
R5F2122AJFP
R5F21226DFP
R5F21227DFP
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parallel port 378H
Abstract: No abstract text available
Text: P rogram m ing LAB NOTES Understanding the New Developments in Parallel Ports BY D O U G L A S B O L I N G fI I erial ports send data relatively slowly over long distances, while parallel ports provide rapid trans mission across short distances. I • discussed serial ports in the Lab
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