CA10
Abstract: V54C3256804VA
Text: MOSEL VITELIC V54C3256804VA HIGH PERFORMANCE 3.3 VOLT 32M X 8 SYNCHRONOUS DRAM 4 BANKS X 8Mbit X 8 PRELIMINARY -7PC -7 -8PC -8 System Frequency fCK 143MHz 143MHz 125MHz 125MHz Clock Cycle Time (tCK3) 7 ns 7 ns 8 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3
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V54C3256804VA
143MHz
125MHz
CA10
V54C3256804VA
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V54C365804VC
Abstract: No abstract text available
Text: MOSEL VITELIC V54C365804VC HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143MHz 133MHz 125 MHz 125 MHz Clock Cycle Time (tCK3) 7 ns 7.5 ns 8 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3
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V54C365804VC
143MHz
133MHz
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PDF
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Untitled
Abstract: No abstract text available
Text: W971632AF 256K x 32 bit x 2 Banks SGRAM Features • • • • • • • • • • • • • • JEDEC standard 3.3V power supply Up to 143MHz clock frequency 262,144 words x 2 banks x 32 bits 1 Bank Select, Row Address A0~A9, Column Address A0~A7
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W971632AF
143MHz
777216-bit
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PDF
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Untitled
Abstract: No abstract text available
Text: NSTS1428-E Apr. 2013 NewJRC SAW FILTER NSTS1428 Application 143MHz STD-T99 Electrical Specification: Table 1 The device characteristics are measured in the circuit shown in Fig.1. Table 1. Electrical Specifications Item JRC Simulation Spec. Typ. Input and Output Impedance
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NSTS1428-E
NSTS1428
143MHz
STD-T99
96MHz
300kHz
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PDF
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A43L2616
Abstract: A43L2616V
Text: A43L2616 1M X 16 Bit X 4 Banks Synchronous DRAM Features n n n n n Clock Frequency: 166MHz @ CL=3 143MHz @ CL=3 n Burst Read Single-bit Write operation n DQM for masking n Auto & self refresh n 64ms refresh period 4K cycle n 54 Pin TSOP (II) JEDEC standard 3.3V power supply
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A43L2616
166MHz
143MHz
A43L2616
A43L2616V
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PDF
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KM4132G271B
Abstract: No abstract text available
Text: KM4132G271B CMOS SGRAM Revision History Revision 2.4 May 1998 • Added KM4132G271B-7 product(143MHz @ CL =3). Revision 2.3 (March 1998) • Added Reverse Type Package in ODERING INFORMATION and PIN CONFIGURATION. • Removed KM4132G271B-H/12 product(-H : 100MHz @ CL =2, -12 : 83MHz @ CL=3).
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KM4132G271B
KM4132G271B-7
143MHz
KM4132G271B-H/12
100MHz
83MHz
125MHz,
125MHz
KM4132G271B
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PDF
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ba 5888
Abstract: V54C3256164VA
Text: MOSEL VITELIC V54C3256164VA HIGH PERFORMANCE 3.3 VOLT 16M X 16 SYNCHRONOUS DRAM 4 BANKS X 4Mbit X 16 PRELIMINARY -7 -8PC -8 System Frequency fCK 143MHz 125 MHz 125 MHz Clock Cycle Time (tCK3) 7 ns 8 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns
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V54C3256164VA
143MHz
ba 5888
V54C3256164VA
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PDF
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Untitled
Abstract: No abstract text available
Text: A43L3616A Preliminary 2M X 16 Bit X 4 Banks Synchronous DRAM Document Title 2M X 16 Bit X 4 Banks Synchronous DRAM Revision History History Issue Date Remark 0.0 Initial issue August 7, 2007 Preliminary 0.1 Change clock frequency from 133MHz to 143MHz at 7ns cycle
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A43L3616A
133MHz
143MHz
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PDF
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CA10
Abstract: V54C365804VB
Text: MOSEL VITELIC V54C365804VB HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143MHz 133MHz 125 MHz 125 MHz Clock Cycle Time (tCK3) 7 ns 7.5 ns 8 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3
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V54C365804VB
143MHz
133MHz
CA10
V54C365804VB
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PDF
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CA10
Abstract: V54C365804VC
Text: V54C365804VC HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 MOSEL VITELIC PRELIMINARY 7 75 8PC 8 System Frequency fCK 143MHz 133MHz 125 MHz 125 MHz Clock Cycle Time (tCK3) 7 ns 7.5 ns 8 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3
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V54C365804VC
143MHz
133MHz
CA10
V54C365804VC
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PDF
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AS4C8M32S-7BCN
Abstract: AS4C8M32S
Text: AS4C8M32S Revision History AS4C8M32S- 90 Ball TFBGA PACKAGE Revision Rev 1.0 Rev 1.1 Rev 2.0 Details Preliminary datasheet Added 166MHz option -6 clock cycle time Typing error page 1 – fast clock rate error 133MHz should be 143MHz Typing error - Frequency in Table 2. Ordering information
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AS4C8M32S
AS4C8M32S-
166MHz
133MHz
143MHz
133MHz
90-Ball
AS4C8M32S-7BCN
AS4C8M32S
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PDF
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A43L3616A
Abstract: No abstract text available
Text: A43L3616A/A43L4608A 2M x 16 Bit x 4 Banks, 4M X 8 Bit X 4 Banks Synchronous DRAM Preliminary Document Title 2M X 16 Bit X 4 Banks Synchronous DRAM Revision History History Issue Date Remark 0.0 Initial issue August 7, 2007 Preliminary 0.1 Change clock frequency from 133MHz to 143MHz at 7ns cycle
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A43L3616A/A43L4608A
133MHz
143MHz
A43L4608A
A43L3616A
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PDF
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Untitled
Abstract: No abstract text available
Text: A43L3616A Series 2M x 16 Bit x 4 Banks Synchronous DRAM Preliminary Document Title 2M x 16 Bit x 4 Banks Synchronous DRAM Revision History History Issue Date Remark 0.0 Initial issue August 7, 2007 Preliminary 0.1 Change clock frequency from 133MHz to 143MHz at 7ns cycle
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Original
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A43L3616A
133MHz
143MHz
A43L4608A
100ns
Novemb037
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PDF
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CA10
Abstract: V54C365804VD
Text: MOSEL VITELIC V54C365804VD L HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT 8M X 8 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 PRELIMINARY 7 75 8PC 8 System Frequency (fCK) 143MHz 133MHz 125 MHz 125 MHz Clock Cycle Time (tCK3) 7 ns 7.5 ns 8 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3
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V54C365804VD
143MHz
133MHz
CA10
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PDF
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Untitled
Abstract: No abstract text available
Text: A43L3616A Series 2M x 16 Bit x 4 Banks Synchronous DRAM Preliminary Document Title 2M x 16 Bit x 4 Banks Synchronous DRAM Revision History History Issue Date Remark 0.0 Initial issue August 7, 2007 Preliminary 0.1 Change clock frequency from 133MHz to 143MHz at 7ns cycle
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Original
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A43L3616A
133MHz
143MHz
A43L4608A
100ns
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PDF
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CA10
Abstract: V54C3256404VA t-16
Text: MOSEL VITELIC V54C3256404VA HIGH PERFORMANCE 3.3 VOLT 64M X 4 SYNCHRONOUS DRAM 4 BANKS X 16Mbit X 4 PRELIMINARY -7 -8PC -8 System Frequency fCK 143MHz 125 MHz 125 MHz Clock Cycle Time (tCK3) 7 ns 8 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns
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V54C3256404VA
16Mbit
143MHz
CA10
V54C3256404VA
t-16
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PDF
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Untitled
Abstract: No abstract text available
Text: A43L2616-PH Series 1M X 16 Bit X 4 Banks Synchronous DRAM Features n n n n n Clock Frequency: 166MHz @ CL=3 143MHz @ CL=3 n Burst Read Single-bit Write operation n DQM for masking n Auto & self refresh n 64ms refresh period 4K cycle n 54 Pin TSOP (II) JEDEC standard 3.3V power supply
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Original
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A43L2616-PH
166MHz
143MHz
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PDF
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KMM966G512BQ
Abstract: km4132g
Text: SGRAM MODULE KMM965G512BQ P N / KMM966G512BQ(P)N Revision History Revision 2.5 (July 1998) • Added -7(143MHz) speed product. • Changed SPD data, Byte #62 from 02h to 00h. • Changed Pin #43 from DQ34 to DQ35 in PIN CONFIGURATIONS. Revision 2.4 (June 1998)
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KMM965G512BQ
KMM966G512BQ
143MHz)
KMM965G512B
KMM966G512B-H/12
100MHz
83MHz
125MHz,
125MHz
km4132g
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PDF
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V54C3256404VA
Abstract: CA10
Text: MOSEL VITELIC V54C3256404VA HIGH PERFORMANCE 3.3 VOLT 64M X 4 SYNCHRONOUS DRAM 4 BANKS X 16Mbit X 4 PRELIMINARY -7 -8PC -8 System Frequency fCK 143MHz 125 MHz 125 MHz Clock Cycle Time (tCK3) 7 ns 8 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns
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V54C3256404VA
16Mbit
143MHz
V54C3256404VA
CA10
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PDF
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1013060/1
Abstract: 2mbit HY57V281620HCT-H HY57V281620HCT-6 HY57V281620HCT-7 HY57V281620HCT-8 HY57V281620HCT-K HY57V281620HCT-P HY57V281620HCT-S
Text: 0.1 : Hynix Change 0.2 : 143Mhz Add, Burst read single write mode correction HY57V281620HC L/S T 4 Banks x 2M x 16bits Synchronous DRAM DESCRIPTION The Hynix HY57V281620HC(L/S)T is a 134,217,728bit CMOS Synchronous DRAM, ideally suited for the main memory applications
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143Mhz
HY57V281620HC
16bits
728bit
152x16
400mil
1013060/1
2mbit
HY57V281620HCT-H
HY57V281620HCT-6
HY57V281620HCT-7
HY57V281620HCT-8
HY57V281620HCT-K
HY57V281620HCT-P
HY57V281620HCT-S
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PDF
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Untitled
Abstract: No abstract text available
Text: I =¥= = = = ’= Advance IBM0664404ET3A IBM0664804ET3A 64Mb Double Data Rate Synchronous DRAM Special Features • 125MHz max clock freq @ CAS Latency=2 • 133MHz max clock freq @ CAS Latency=2.5 • 143MHz max clock freq @ CAS Latency=3 • On-chip DLL to align output data with input clock
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OCR Scan
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IBM0664404ET3A
IBM0664804ET3A
125MHz
133MHz
143MHz
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PDF
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ir tk 2238
Abstract: IT191 CA10 V54C365804VC tk 2238 7777777Z
Text: M O S E L V IT E L IC V54C365804VC HIGH PERFORMANCE 143/133/125 MHz 3.3 VOLT8MX8SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 8 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143MHz 133MHz 125 MHz 125 MHz Clock Cycle Tim e (tcK 3 ) 7 ns 7.5 ns 8 ns 8 ns Clock Access Tim e (tAC3) CAS Latency = 3
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OCR Scan
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V54C365804VC
143MHz
133MHz
V54C365804VC
54-Pin
L0-40
ir tk 2238
IT191
CA10
tk 2238
7777777Z
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PDF
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Untitled
Abstract: No abstract text available
Text: M EM O RY SCs FUNCTION GUIDE 1. GRAPHIC BUFFER MEMORY PRODUCT TREE - KM4132QS71A : Up to 143MHz, 2nd Generation * SYNCHRONOUS DRAM PRODUCT TREE 64M bit , IBM * 4 :U p to 1 5 0 M H z SM X B : Up to 150MHz 4 M X 16 : Up to 150MHz Under D evelopm ent 152 ELECTRONICS
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OCR Scan
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KM4132QS71A
143MHz,
150MHz
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PDF
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Untitled
Abstract: No abstract text available
Text: M OSEL VITELIC V54C365804VB HIGH PERFORMANCE 143/133/125 MHz 3.3 V O LT 8M X 8S Y N C H R O N O U S DRAM 4 BANKS X 2M bit X 8 PRELIMINARY 7 75 8PC 8 System Frequency fCK 143MHz 133MHz 125 MHz 125 MHz Clock Cycle Tim e (tcK 3 ) 7 ns 7.5 ns 8 ns 8 ns Clock Access Tim e (tAC3) CAS Latency = 3
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OCR Scan
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V54C365804VB
143MHz
133MHz
54-Pin
V54C365804VB
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PDF
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