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    74AC11086N Search Results

    74AC11086N Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    74AC11086N Texas Instruments Quadruple 2-Input Exclusive-OR Gates 16-PDIP -40 to 85 Visit Texas Instruments Buy
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    74AC11086N Price and Stock

    Texas Instruments 74AC11086N

    IC GATE XOR 4CH 2-INP 16DIP
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    DigiKey 74AC11086N Tube 51 1
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    Mouser Electronics 74AC11086N 220
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    Verical 74AC11086N 9,500 215
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    74AC11086N 1,975 215
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    74AC11086N 1,900 215
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    Rochester Electronics 74AC11086N 38,210 1
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    Rochester Electronics LLC 74AC11086N

    IC GATE XOR 4CH 2-INP 16DIP
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    DigiKey 74AC11086N Bulk 194
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    Texas Instruments SN74AC11086N

    IC,LOGIC GATE,QUAD 2-INPUT XOR,AC-CMOS,DIP,16PIN,PLASTIC (Also Known As: 74AC11086N)
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    Quest Components SN74AC11086N 34
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    Texas Instruments 74AC11086NE4

    74AC11086 Quadruple 2-Input Exclusive-OR Gates '
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    Rochester Electronics 74AC11086NE4 63 1
    • 1 $1.59
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    74AC11086N Datasheets (7)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AC11086N Texas Instruments Quadruple 2-Input Exclusive-OR Gate Original PDF
    74AC11086N Texas Instruments Quadruple 2-Input Exclusive-OR Gates 16-PDIP -40 to 85 Original PDF
    74AC11086N Texas Instruments 74AC11086 - Quadruple 2-Input Exclusive-OR Gates 16-PDIP -40 to 85 Original PDF
    74AC11086N Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    74AC11086N Texas Instruments QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES Scan PDF
    74AC11086NE4 Texas Instruments Quadruple 2-Input Exclusive-OR Gates 16-PDIP -40 to 85 Original PDF
    74AC11086NE4 Texas Instruments 74AC11086 - Quadruple 2-Input Exclusive-OR Gates 16-PDIP -40 to 85 Original PDF

    74AC11086N Datasheets Context Search

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    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil 4-Oct-2007 74AC11086DR

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil 9-Jun-2007 74AC11086DR 74AC11086DR

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil

    74AC11086

    Abstract: 74AC11086D 74AC11086DE4 74AC11086DR 74AC11086DRE4 74AC11086N
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil 74AC11086 74AC11086D 74AC11086DE4 74AC11086DR 74AC11086DRE4 74AC11086N

    74AC11086

    Abstract: 74AC11086D 74AC11086DE4 74AC11086DG4 74AC11086DR 74AC11086DRE4 74AC11086DRG4 74AC11086N 74AC11086NE4
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil 19-Mar-2008 74AC11086DR 74AC11086 74AC11086D 74AC11086DE4 74AC11086DG4 74AC11086DR 74AC11086DRE4 74AC11086DRG4 74AC11086N 74AC11086NE4

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil 12-Jan-2008 74AC11086DR

    74AC11086

    Abstract: 74AC11086D 74AC11086DR 74AC11086N
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil 74AC11086 74AC11086D 74AC11086DR 74AC11086N

    Untitled

    Abstract: No abstract text available
    Text: 74AC11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATE SCAS081A – NOVEMBER 1989 – REVISED APRIL 1996 D D D D Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC  Enhanced-Performance Implanted CMOS 1-µm Process 500-mA Typical Latch-Up Immunity at


    Original
    PDF 74AC11086 SCAS081A 500-mA 300-mil