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    74LVX00 Search Results

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    74LVX00 Price and Stock

    onsemi 74LVX00MTCX

    IC GATE NAND 4CH 2-INP 14TSSOP
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    DigiKey 74LVX00MTCX Digi-Reel 8,978 1
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    74LVX00MTCX Reel 7,500 2,500
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    TME 74LVX00MTCX 1
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    Avnet Silica 74LVX00MTCX 16 Weeks 2,500
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    onsemi MC74LVX00DR2G

    IC GATE NAND 4CH 2-INP 14SOIC
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    DigiKey MC74LVX00DR2G Cut Tape 1,585 1
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    MC74LVX00DR2G Digi-Reel 1,585 1
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    Newark MC74LVX00DR2G Reel 2,500
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    Bristol Electronics MC74LVX00DR2G 978
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    Rochester Electronics MC74LVX00DR2G 26,584 1
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    onsemi 74LVX00MX

    IC GATE NAND 4CH 2-INP 14SOIC
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    DigiKey 74LVX00MX Digi-Reel 1
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    Avnet Americas 74LVX00MX Reel 0 Weeks, 2 Days 3,334
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    Verical 74LVX00MX 17,500 1,441
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    74LVX00MX 12,500 1,441
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    Rochester Electronics 74LVX00MX 30,000 1
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    Flip Electronics 74LVX00MX 162,306
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    Flip Electronics 74LVX00MX

    IC GATE NAND 4CH 2-INP 14SOIC
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    DigiKey 74LVX00MX Reel 3,000
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    Rochester Electronics LLC 74LVX00MX

    IC GATE NAND 4CH 2-INP 14SOIC
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    74LVX00 Datasheets (50)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVX00 Fairchild Semiconductor Low Voltage Quad 2-Input NAND Gate Original PDF
    74LVX00 Fairchild Semiconductor Low Voltage Quad 2-Input NAND Gate Original PDF
    74LVX00 National Semiconductor Low Voltage Quad 2-Input NAND Gate Original PDF
    74LVX00 STMicroelectronics LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE Original PDF
    74LVX00M Fairchild Semiconductor Low Voltage Quad 2-Input NAND Gate; Package: SOIC; No of Pins: 14; Container: Rail Original PDF
    74LVX00M Fairchild Semiconductor Low Voltage Quad 2-Input NAND Gate Original PDF
    74LVX00M Fairchild Semiconductor Low Voltage Quad 2-Input NAND Gate Original PDF
    74LVX00M STMicroelectronics LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE Original PDF
    74LVX00M STMicroelectronics LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE Original PDF
    74LVX00M Fairchild Semiconductor Low Voltage Quad 2-input NAND Gate Scan PDF
    74LVX00M Fairchild Semiconductor Low Voltage Quad 2-lnput NAND Gate Scan PDF
    74LVX00M National Semiconductor Low Voltage Quad 2-input NAND Gate Scan PDF
    74LVX00M STMicroelectronics LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE Scan PDF
    74LVX00M_NL Fairchild Semiconductor Low Voltage Quad 2-Input NAND Gate Original PDF
    74LVX00MSCX Fairchild Semiconductor Low Voltage Quad 2-Input NAND Gate Original PDF
    74LVX00MTC Fairchild Semiconductor Low Voltage Quad 2-Input NAND Gate Original PDF
    74LVX00MTC Fairchild Semiconductor Low Voltage Quad 2-Input NAND Gate; Package: TSSOP; No of Pins: 14; Container: Rail Original PDF
    74LVX00MTC Fairchild Semiconductor Low Voltage Quad 2-Input NAND Gate Original PDF
    74LVX00MTC Fairchild Semiconductor Low Voltage Quad 2-input NAND Gate Scan PDF
    74LVX00MTC Fairchild Semiconductor Low Voltage Quad 2-lnput NAND Gate Scan PDF

    74LVX00 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LVX00

    Abstract: 74LVX00M 74LVX00MTC 74LVX00SJ LVX00 M14A M14D MTC14
    Text: 74LVX00 Low Voltage Quad 2-Input NAND Gate Features General Description • Input voltage level translation from 5V to 3V The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.


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    PDF 74LVX00 LVX00 74LVX00M 74LVX00SJ 74LVX00MTC 14-Lead MS-012, MTC14 74LVX00 74LVX00M 74LVX00MTC 74LVX00SJ M14A M14D MTC14

    74LVX00

    Abstract: 74LVX00M 74LVX00T TSSOP14
    Text: 74LVX00  LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.1 ns TYP. at VCC = 3.3V INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V


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    PDF 74LVX00 74LVX00 74LVX00M 74LVX00T TSSOP14

    truth table NAND gate 74

    Abstract: 74LVX00 74LVX00M 74LVX00MTR 74LVX00TTR TSSOP14
    Text: 74LVX00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 4.1ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C


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    PDF 74LVX00 74LVX00 truth table NAND gate 74 74LVX00M 74LVX00MTR 74LVX00TTR TSSOP14

    74LVX00SJ

    Abstract: LVX00 M14A M14D MTC14 74LVX00 74LVX00M 74LVX00MTC
    Text: 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. n Input voltage level translation from 5V to 3V n Ideal for low power/low noise 3.3V applications


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    PDF 74LVX00 LVX00 74LVX00M 74LVX00SJ 74LVX00MTC 14-Lead 14-Lead MTC14 74LVX00SJ M14A M14D MTC14 74LVX00 74LVX00M 74LVX00MTC

    LVX00

    Abstract: 74LVX00 74LVX00M 74LVX00MTC 74LVX00SJ M14A M14D MTC14
    Text: Revised September 2003 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V


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    PDF 74LVX00 LVX00 74LVX00M 74LVX00SJ 74LVX00MTC 14-Lead MS-012, MTC14 74LVX00 74LVX00M 74LVX00MTC 74LVX00SJ M14A M14D MTC14

    74LVX00

    Abstract: 74LVX00M 74LVX00MTC 74LVX00MTCX 74LVX00MX 74LVX00SJ 74LVX00SJX LVX00 M14A M14D
    Text: 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVX00 contains four 2-input NAND gates The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems Y Y Y Y Logic Symbol Input voltage level translation from 5V to 3V


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    PDF 74LVX00 LVX00 C1996 74LVX00 74LVX00M 74LVX00MTC 74LVX00MTCX 74LVX00MX 74LVX00SJ 74LVX00SJX M14A M14D

    d flip flop

    Abstract: quad 2-input nand schmitt trigger 74LVX00 74LVX02 74LVX04 74LVX08 74LVX112 74LVX125 74LVX132 74LVX14
    Text: Logic Products by Family LVX Low Voltage Products Logic Product Function Product Description Package Voltage Node 74LVX00 Gate Low Voltage Quad 2-Input NAND Gate SOIC SOP TSSOP 2.7 3.3 74LVX02 Gate Low Voltage Quad 2-Input NOR Gate SOIC SOP TSSOP 2.7 3.3


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    PDF 74LVX00 74LVX02 74LVX04 74LVX08 74LVX14 74LVX32 74LVX74 74LVX4245 74LVXC4245 74LVX161284 d flip flop quad 2-input nand schmitt trigger 74LVX00 74LVX02 74LVX04 74LVX08 74LVX112 74LVX125 74LVX132 74LVX14

    74LVX00

    Abstract: 74LVX00M 74LVX00MTR 74LVX00TTR TSSOP14
    Text: 74LVX00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 4.1ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C


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    PDF 74LVX00 74LVX00 74LVX00M 74LVX00MTR 74LVX00TTR TSSOP14

    74LVX00

    Abstract: 74LVX00M 74LVX00MTC 74LVX00SJ LVX00 M14A M14D MTC14
    Text: Revised March 1999 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V


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    PDF 74LVX00 LVX00 74LVX00M 74LVX00SJ 74LVX00MTC MTC14 14-Lead MS-120, 74LVX00 74LVX00M 74LVX00MTC 74LVX00SJ M14A M14D MTC14

    74LVX00

    Abstract: 74LVX00M 74LVX00MTC 74LVX00MTCX 74LVX00MX 74LVX00SJ LVX00 M14A M14D MTC14
    Text: Revised February 2005 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V


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    PDF 74LVX00 LVX00 74LVX00M 14-Lead MS-012, 74LVX00MX 14-LeadWITHOUT 74LVX00 74LVX00M 74LVX00MTC 74LVX00MTCX 74LVX00SJ M14A M14D MTC14

    74LVX00

    Abstract: 74LVX00M 74LVX00T TSSOP14
    Text: 74LVX00  LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.1 ns TYP. at VCC = 3.3V INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V


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    PDF 74LVX00 74LVX00 74LVX00M 74LVX00T TSSOP14

    74LVX00

    Abstract: 74LVX00TTR 74LVX00MTR TSSOP14
    Text: 74LVX00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4.1ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C


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    PDF 74LVX00 74LVX00 74LVX00TTR 74LVX00MTR TSSOP14

    Untitled

    Abstract: No abstract text available
    Text: 74LVX00 Low Voltage Quad 2-Input NAND Gate Features General Description • Input voltage level translation from 5V to 3V The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.


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    PDF 74LVX00 LVX00 74LVX00M 74LVX00SJ 74LVX00MTC 14-Lead MS-012, MTC14

    74LVX132

    Abstract: 74LVX00 74LVX132M 74LVX132MTR 74LVX132TTR TSSOP14
    Text: 74LVX132 LOW VOLTAGE CMOS QUAD 2-INPUT SCHMITT NAND GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 5.9ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C TYPICAL HYSTERESIS : 0.7V at VCC = 3.3V


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    PDF 74LVX132 74LVX132 74LVX00 74LVX132M 74LVX132MTR 74LVX132TTR TSSOP14

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


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    PDF SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N

    74LVT JK Flip Flop

    Abstract: led driver SOT23 6pin lcx244 MOTOROLA lcx 4245 LCX244 quad single supply 50 Ohm Line Drivers diode sj Fairchild Power Switch package to 220 p5 MAX 16841 On semiconductor LCX 574 PA
    Text: 1 Chapter 1 Introduction to Low-Voltage Logic Chapter C R O S S V O L T Parts & Availability 17 Packaging Options 37 Low-Voltage Logic Cross Reference 49 Glossary 57 Fairchild Low-Voltage Logic Reference Guide Chapter Chapter Glossary  Introduction to Low-Voltage Logic


    Original
    PDF

    74LVX00

    Abstract: No abstract text available
    Text: 74LVX00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE . HIGH SPEED: tpD =4.1 ns TYP. at Vcc = 3.3V . INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V . LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V o l p = 0 .3 V (TYP.) at V c c = 3 .3 V


    OCR Scan
    PDF 74LVX00 74LVX00 TSS0P14

    74LVX00

    Abstract: No abstract text available
    Text: S E M [CONDUCTOR TM 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVXOO contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys­ tems to 3V systems. • Input voltage level translation from 5V to 3V


    OCR Scan
    PDF 74LVX00 74LVX00M 74LVX00SJ 74LVX00MTC 14-Lead MS-120, MTC14 74LVX00

    Untitled

    Abstract: No abstract text available
    Text: Section 8 LV X Family * Section 8 Contents LVX Family Features. 74LVX00 Low Voltage Quad 2-Input NAND G a t e .


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    PDF 74LVX00 74LVX02 74LVX04 74LVX08 74LVX14 74LVX244 74LVX245 74LVX273 74LVX373 74LVX374

    74LVX00

    Abstract: 74LVX00M 74LVX00T TSSOP14
    Text: 74LVX00 LOW VOLTAGE CM O S QUAD 2-IN P U T NAND GATE . . . . . . HIGH SPEED: tpD =4.1 ns TYP. at V cc = 3.3V INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at V cc = 3 V LOW POWER DISSIPATION: Icc = 2 |uA (MAX.) at T a = 25 °C LOW NOISE: Volp = 0.3 V (TYP.) at Vcc = 3.3V


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    PDF 74LVX00 74LVX00 P013G TSSOP14 74LVX00M 74LVX00T

    74LVX00

    Abstract: 74LVX00M 74LVX00MTC 74LVX00MTCX 74LVX00MX 74LVX00SJ 74LVX00SJX M14A M14D
    Text: LVXOO National Semiconductor 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVXOO contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys­ tems to 3V systems. • Input voltage level translation from 5V to 3V


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    PDF 74LVX00 TL/F/11551â TL/F/11551-2 74LVX00M 74LVX00MX 74LVX00SJ 74LVX2 74LVX00 74LVX00MTC 74LVX00MTCX 74LVX00SJX M14A M14D

    BT 151 PIN DIAGRAM

    Abstract: 74LVX00 74LVX00M 74LVX00MTC 74LVX00SJ M14A M14D MTC14 B738 772 soic 8
    Text: S E M IC O N D U C T O R tm 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVXOO contains four 2-input N AND gates. The inputs to l­ erate voltages up to 7V allowing th e interface of 5V system s to 3 V system s. • Input voltage level translation from 5V to 3V


    OCR Scan
    PDF 74LVX00 74LVX00M 14-Lead 74LVX00SJ 14-Lead 74LVX00MTC MTC14 BT 151 PIN DIAGRAM 74LVX00 M14A M14D B738 772 soic 8

    74LVX00

    Abstract: No abstract text available
    Text: 74LVX00 LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE . HIGH SPEED: tpD =4.1 ns TYP. at Vcc = 3.3V . INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V . LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at Vcc = 3.3V


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    PDF 74LVX00 74LVX00 TSS0P14

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVXOO contains lour 2-input NAND gates. The inputs tol­ erate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation trom 5V to 3V


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    PDF 74LVX00 74LVX00M 74LVX00SJ 74LVX00MTC MTC14 14-Lead 14-Lead