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    74LVX74 Price and Stock

    onsemi MC74LVX74DR2G

    IC FF D-TYPE DUAL 1BIT 14SOIC
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    DigiKey MC74LVX74DR2G Cut Tape 3,967 1
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    MC74LVX74DR2G Digi-Reel 3,967 1
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    Avnet Americas MC74LVX74DR2G Reel 12 Weeks 5,000
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    Mouser Electronics MC74LVX74DR2G 2,932
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    Bristol Electronics MC74LVX74DR2G 2,450
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    Rochester Electronics MC74LVX74DR2G 53,878 1
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    onsemi 74LVX74MTCX

    IC FF D-TYPE DUAL 1BIT 14TSSOP
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    DigiKey 74LVX74MTCX Digi-Reel 3,675 1
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    74LVX74MTCX Cut Tape 3,675 1
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    74LVX74MTCX Reel 2,500 2,500
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    74LVX74MTCX Reel 12 Weeks 5,000
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    Mouser Electronics 74LVX74MTCX 19,080
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    Newark 74LVX74MTCX Reel 2,500
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    Onlinecomponents.com 74LVX74MTCX
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    TME 74LVX74MTCX 1,685 1
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    onsemi 74LVX74MX

    IC FF D-TYPE DUAL 1BIT 14SOIC
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    DigiKey 74LVX74MX Digi-Reel 95 1
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    74LVX74MX Cut Tape 95 1
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    Avnet Americas 74LVX74MX Reel 0 Weeks, 2 Days 8,621
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    Verical 74LVX74MX 2,500 2,500
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    74LVX74MX 575 71
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    74LVX74MX 427 29
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    Arrow Electronics 74LVX74MX 2,500 99 Weeks 2,500
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    74LVX74MX 575 1
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    Rochester Electronics LLC MC74LVX74DTG

    IC FF D-TYPE DUAL 1BIT 14TSSOP
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    DigiKey MC74LVX74DTG Bulk 1,047
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    onsemi MC74LVX74DTG

    IC FF D-TYPE DUAL 1BIT 14TSSOP
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    Rochester Electronics MC74LVX74DTG 84,864 1
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    74LVX74 Datasheets (40)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74LVX74 Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVX74 STMicroelectronics LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR (5V TOLERANT INPUTS) Original PDF
    74LVX74 STMicroelectronics LOW VOLTAGE DUAL D-TYPE FLIP FLOP WITH RESET AND CLEAR Original PDF
    74LVX74M Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop; Package: SOIC; No of Pins: 14; Container: Rail Original PDF
    74LVX74M Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVX74M Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVX74M National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVX74M STMicroelectronics LOW VOLTAGE DUAL D-TYPE FLIP FLOP WITH RESET AND CLEAR Original PDF
    74LVX74M STMicroelectronics Low Voltage CMOS Dual D-Type Flip Flop with Preset and Clear (5 V Tolerant Inputs) Original PDF
    74LVX74M National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Scan PDF
    74LVX74MSCX Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVX74MTC Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVX74MTC Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop; Package: TSSOP; No of Pins: 14; Container: Rail Original PDF
    74LVX74MTC National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVX74MTC National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Scan PDF
    74LVX74MTCX Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop; Package: TSSOP; No of Pins: 14; Container: Tape & Reel Original PDF
    74LVX74MTCX Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVX74MTCX National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF
    74LVX74MTCX National Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Scan PDF
    74LVX74MTCX_NL Fairchild Semiconductor Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Original PDF

    74LVX74 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74LVX74

    Abstract: 74LVX74M 74LVX74MTR 74LVX74TTR TSSOP14
    Text: 74LVX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 145MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V AT VCC=3V LOW POWER DISSIPATION:


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    PDF 74LVX74 145MHz 74LVX74 74LVX74M 74LVX74MTR 74LVX74TTR TSSOP14

    74LVX74

    Abstract: 74LVX74MTR 74LVX74TTR TSSOP14
    Text: 74LVX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 145MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2V AT VCC=3V LOW POWER DISSIPATION:


    Original
    PDF 74LVX74 145MHz 74LVX74 74LVX74MTR 74LVX74TTR TSSOP14

    LVX74

    Abstract: 74LVX74SJ M14A 74LVX74 74LVX74M 74LVX74MTC M14D MTC14
    Text: Revised December 2003 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    Original
    PDF 74LVX74 LVX74 74LVX74SJ M14A 74LVX74 74LVX74M 74LVX74MTC M14D MTC14

    LVX74

    Abstract: 74LVX74 74LVX74M 74LVX74MTC 74LVX74SJ M14A M14D MTC14
    Text: 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Features General Description • Input voltage level translation from 5V to 3V The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on


    Original
    PDF 74LVX74 LVX74 74LVX74 74LVX74M 74LVX74MTC 74LVX74SJ M14A M14D MTC14

    74LVX74

    Abstract: 74LVX74M 74LVX74MTR 74LVX74TTR TSSOP14
    Text: 74LVX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 145MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V AT VCC=3V LOW POWER DISSIPATION:


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    PDF 74LVX74 145MHz 74LVX74 74LVX74M 74LVX74MTR 74LVX74TTR TSSOP14

    74LVX74

    Abstract: 74LVX74M 74LVX74MTC 74LVX74SJ LVX74 M14A M14D MTC14
    Text: 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the positive


    Original
    PDF 74LVX74 LVX74 74LVX74 74LVX74M 74LVX74MTC 74LVX74SJ M14A M14D MTC14

    74LVX74

    Abstract: 74LVX74M 74LVX74MTC 74LVX74SJ LVX74 M14A M14D MTC14
    Text: 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the positive


    Original
    PDF 74LVX74 LVX74 74LVX74 74LVX74M 74LVX74MTC 74LVX74SJ M14A M14D MTC14

    74LVX74

    Abstract: 74LVX74M 74LVX74MTR 74LVX74TTR TSSOP14
    Text: 74LVX74  LOW VOLTAGE DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 145 MHz TYP. at VCC = 3.3V INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC


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    PDF 74LVX74 74LVX74 74LVX74M 74LVX74MTR 74LVX74TTR TSSOP14

    74LVX74

    Abstract: No abstract text available
    Text: 74LVX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 145MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2V AT VCC=3V LOW POWER DISSIPATION:


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    PDF 74LVX74 145MHz 74LVX74

    Untitled

    Abstract: No abstract text available
    Text: 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Features General Description • Input voltage level translation from 5V to 3V The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on


    Original
    PDF 74LVX74 LVX74 74LVX74

    74LVX74

    Abstract: 74LVX74M 74LVX74MTC 74LVX74MTCX 74LVX74MX 74LVX74SJ 74LVX74SJX LVX74 M14A M14D
    Text: 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q Q outputs Information at the input is transferred to the outputs on the


    Original
    PDF 74LVX74 LVX74 74LVX74 74LVX74M 74LVX74MTC 74LVX74MTCX 74LVX74MX 74LVX74SJ 74LVX74SJX M14A M14D

    74LVX74

    Abstract: 74LVX74M 74LVX74MTC 74LVX74SJ LVX74 M14A M14D MTC14
    Text: Revised March 1999 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description Asynchronous Inputs: The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    Original
    PDF 74LVX74 LVX74 74LVX74 74LVX74M 74LVX74MTC 74LVX74SJ M14A M14D MTC14

    74LVX74

    Abstract: 74LVX74M 74LVX74MTC 74LVX74MTCX 74LVX74SJ LVX74 M14A M14D MTC14
    Text: Revised February 2005 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    Original
    PDF 74LVX74 LVX74 74LVX74 74LVX74M 74LVX74MTC 74LVX74MTCX 74LVX74SJ M14A M14D MTC14

    master slave jk flip flop

    Abstract: ECL D flip flop Flip Flop DIP Flip flop JK cmos 74lvt16374 d flip flop d type flip flop flip flop flip flop circuit flip flop circuit type D
    Text: Logic Products by Function Flip-Flop Products Logic Product Family Product Description Package Voltage Node 74ACT109 FACT ACT Dual JK Positive Edge-Triggered Flip-Flop DIP SOIC TSSOP 5 DM74LS73A Bipolar-LS Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary


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    PDF 74ACT109 DM74LS73A MM74C73 74AC74 74ACT74 74ACTQ74 16-Bit 74VCXH162374 SCAN182374A master slave jk flip flop ECL D flip flop Flip Flop DIP Flip flop JK cmos 74lvt16374 d flip flop d type flip flop flip flop flip flop circuit flip flop circuit type D

    5555 FAIRCHILD optocoupler

    Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
    Text: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference


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    PDF SCYB017A A010203 5555 FAIRCHILD optocoupler MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N

    74LVT JK Flip Flop

    Abstract: led driver SOT23 6pin lcx244 MOTOROLA lcx 4245 LCX244 quad single supply 50 Ohm Line Drivers diode sj Fairchild Power Switch package to 220 p5 MAX 16841 On semiconductor LCX 574 PA
    Text: 1 Chapter 1 Introduction to Low-Voltage Logic Chapter C R O S S V O L T Parts & Availability 17 Packaging Options 37 Low-Voltage Logic Cross Reference 49 Glossary 57 Fairchild Low-Voltage Logic Reference Guide Chapter Chapter Glossary  Introduction to Low-Voltage Logic


    Original
    PDF

    schematic diagram atx Power supply 500w

    Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
    Text: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455


    Original
    PDF P462-ND P463-ND LNG295LFCP2U LNG395MFTP5U US2011) schematic diagram atx Power supply 500w pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS

    dn 101

    Abstract: No abstract text available
    Text: 998 S E M IC O N D U C T O R tm 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop Clear and Set are independent of clock General Description The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Informa­


    OCR Scan
    PDF 74LVX74 LVX74 dn 101

    Untitled

    Abstract: No abstract text available
    Text: S E M [CONDUCTOR TM 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    OCR Scan
    PDF 74LVX74 LVX74

    74LVX74

    Abstract: 74LVX74M 74LVX74MTC 74LVX74SJ LVX74 M14A M14D MTC14
    Text: EMICDNDUCTOR t 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description C lear and Set are independent of clock The LVX74 is a dual D-type flip-flop w ith Asynchronous C lear and Set inputs and com plem entary Q, Q outputs. Inform a­


    OCR Scan
    PDF 74LVX74 LVX74 74LVX74 74LVX74M 74LVX74MTC 74LVX74SJ M14A M14D MTC14

    IL52

    Abstract: LVX74 CT-501 74LVX74 74LVX74M 74LVX74MTC 74LVX74MTCX 74LVX74MX 74LVX74SJ 74LVX74SJX
    Text: X > N ational Semiconductor 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the


    OCR Scan
    PDF 74LVX74 LVX74 74LVX74 b50in IL52 CT-501 74LVX74M 74LVX74MTC 74LVX74MTCX 74LVX74MX 74LVX74SJ 74LVX74SJX

    Untitled

    Abstract: No abstract text available
    Text: Revised March 1999 SEMICONDUCTOR TM 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description A synchronous Inputs: The LVX74 is a dual D-type flip-flop with Asynchronous C lear and S e t inputs and com plem entary Q, Q outputs.


    OCR Scan
    PDF 74LVX74 LVX74

    LVX74

    Abstract: No abstract text available
    Text: LVX74 EHSemiconductor National 74LVX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop General Description Features The LVX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, (5 outputs. Information at the input is transferred to the outputs on the


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    PDF LVX74 74LVX74 LVX74 74LVX74

    Untitled

    Abstract: No abstract text available
    Text: ALPHANUMERICAL INDEX LCX FAMILY Type Number Function Package Page Number 51 74LCX00 Quad 2-Input NAND Gate with 5V Tolerant Input TSS0P/S014 74LCX02 Quad 2-Input NOR Gate with 5V Tolerant Input TSS0P/S014 57 74LCX04 Hex Inverter with 5V Tolerant Input TSS0P/S014


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    PDF 74LCX00 74LCX02 74LCX04 74LCX08 74LCX14 74LCX32 74LCX74 74LCX86 74LCX125 74LCX240