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    CY7C1360 Price and Stock

    Infineon Technologies AG CY7C1360C-166AXI

    IC SRAM 9MBIT PARALLEL 100TQFP
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    DigiKey CY7C1360C-166AXI Tray 366 1
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    CY7C1360C-166AXI 216 1
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    Chip1Stop CY7C1360C-166AXI Tray 10
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    Infineon Technologies AG CY7C1360C-200AXC

    IC SRAM 9MBIT PARALLEL 100TQFP
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    DigiKey CY7C1360C-200AXC Tray 358 1
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    CY7C1360C-200AXC Tray 11 Weeks 360
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    Mouser Electronics CY7C1360C-200AXC 69
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    Verical CY7C1360C-200AXC 274 28
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    CY7C1360C-200AXC 72 1
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    Arrow Electronics CY7C1360C-200AXC 72 1
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    EBV Elektronik CY7C1360C-200AXC 12 Weeks 360
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    Cypress Semiconductor CY7C1360C-166BZC

    NO WARRANTY
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    DigiKey CY7C1360C-166BZC Tray 287 1
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    Flip Electronics CY7C1360C-166BZC 2,102
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    Infineon Technologies AG CY7C1360C-166AJXC

    IC SRAM 9MBIT PARALLEL 100TQFP
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    DigiKey CY7C1360C-166AJXC Tray 23 1
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    • 10 $11.884
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    Rochester Electronics LLC CY7C1360A-150AC

    IC SRAM 9MBIT PAR 150MHZ 100TQFP
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    DigiKey CY7C1360A-150AC Bag 23
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    CY7C1360 Datasheets (80)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1360 Cypress Semiconductor Original PDF
    CY7C1360A Cypress Semiconductor 256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Original PDF
    CY7C1360A-150AC Cypress Semiconductor 256K x 36 pipelined SRAM, 150MHz Original PDF
    CY7C1360A-150AJC Cypress Semiconductor 256K x 36 pipelined SRAM, 150MHz Original PDF
    CY7C1360A-150BGC Cypress Semiconductor 256K x 36 pipelined SRAM, 150MHz Original PDF
    CY7C1360A-150BGC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 9MBIT 150MHZ 119BGA Original PDF
    CY7C1360A-166AC Cypress Semiconductor 256K x 36 pipelined SRAM, 166MHz Original PDF
    CY7C1360A-166AJC Cypress Semiconductor 256K x 36 pipelined SRAM, 166MHz Original PDF
    CY7C1360A-166BGC Cypress Semiconductor 256K x 36 pipelined SRAM, 166MHz Original PDF
    CY7C1360A-200AC Cypress Semiconductor 256K x 36 pipelined SRAM, 200MHz Original PDF
    CY7C1360A-200AJC Cypress Semiconductor 256K x 36 pipelined SRAM, 200MHz Original PDF
    CY7C1360A-200BGC Cypress Semiconductor 256K x 36 pipelined SRAM, 200MHz Original PDF
    CY7C1360A-225AC Cypress Semiconductor 256K x 36 pipelined SRAM, 225MHz Original PDF
    CY7C1360A-225AJC Cypress Semiconductor 256K x 36 pipelined SRAM, 225MHz Original PDF
    CY7C1360A-225BGC Cypress Semiconductor 256K x 36 pipelined SRAM, 225MHz Original PDF
    CY7C1360B Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined SRAM Original PDF
    CY7C1360B-166AC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined SRAM Original PDF
    CY7C1360B-166AI Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined SRAM Original PDF
    CY7C1360B-166AJC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined SRAM Original PDF
    CY7C1360B-166AJI Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined SRAM Original PDF

    CY7C1360 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CY7C1360C-250BGC

    Abstract: CY7C1360C CY7C1362C CY7C1360C-166BZI
    Text: CY7C1360C CY7C1362C PRELIMINARY 9-Mbit 256K x 36/512K x 18 Pipelined SRAM Functional Description[1] Features • • • • • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 166 MHz


    Original
    PDF CY7C1360C CY7C1362C 36/512K 250-MHz 200-MHz 166-MHz CY7C1360C-250BGC CY7C1360C CY7C1362C CY7C1360C-166BZI

    CY7C1362A

    Abstract: GVT71512D18
    Text: CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Features • • • • • • • • • • • • • • • • • • Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns Fast clock speed: 225, 200, 166, and 150 MHz


    Original
    PDF CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 36/512K CY7C1360A/GVT71256D36 CY7C1362A GVT71512D18

    CY7C136B

    Abstract: No abstract text available
    Text: CY7C1360B CY7C1362B PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM Features All synchronous inputs pass through input registers controlled by the rising edge of the clock. All data outputs pass through output registers controlled by the rising edge of the clock.


    Original
    PDF CY7C1360B CY7C1362B 36/512K 250-MHz 200-MHz 166-MHz 100-pin 119-Ball 165-Ball CY7C1360B/CY7C1362B CY7C136B

    CY7C1360C-166BZI

    Abstract: CY7C1360C166BZI
    Text: CY7C1360C CY7C1362C PRELIMINARY 9-Mbit 256K x 36/512K x 18 Pipelined SRAM Functional Description[1] Features • • • • • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 166 MHz


    Original
    PDF CY7C1360C CY7C1362C 36/512K 250-MHz 200-MHz 166-MHz 100-pin 119-ball 165-Ball 119-BGA CY7C1360C-166BZI CY7C1360C166BZI

    Untitled

    Abstract: No abstract text available
    Text: CY7C1360B CY7C1362B 9-Mb 256K x 36/512K x 18 Pipelined SRAM Functional Description[1] Features • Supports bus operation up to 225 MHz • Available speed grades are 225, 200 and 166 MHz • Registered inputs and outputs for pipelined operation • 3.3V core power supply


    Original
    PDF CY7C1360B CY7C1362B 36/512K 225-MHz 200-MHz 166-MHz 100-pin 119-ball 165-Ball

    Untitled

    Abstract: No abstract text available
    Text: CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining


    Original
    PDF CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 36/512K

    CY7C1360

    Abstract: CY7C1360V25 CY7C1362V25 CY7C1364V25 intel 80.82
    Text: CY7C1360V25 CY7C1362V25 CY7C1364V25 PRELIMINARY 256K x 36/256K x 32/512K x 18 Pipelined SRAM Features • Supports 200-MHz bus • Fully registered inputs and outputs for pipelined operation • Single 2.5V power supply • Fast clock-to-output times — 3.1 ns for 200-MHz device


    Original
    PDF CY7C1360V25 CY7C1362V25 CY7C1364V25 36/256K 32/512K 200-MHz 166-MHz 133-MHz 100-MHz CY7C1360 CY7C1360V25 CY7C1362V25 CY7C1364V25 intel 80.82

    CY7C1360C

    Abstract: CY7C1362C
    Text: CY7C1360C CY7C1362C 9-Mbit 256K x 36/512K x 18 Pipelined SRAM Functional Description[1] Features • • • • • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 166 MHz Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1360C CY7C1362C 36/512K 250-MHz 200-MHz 166-MHz 119-BGA 250MHz CY7C1360C CY7C1362C

    CY7C1360B

    Abstract: CY7C1362B
    Text: CY7C1360B CY7C1362B 9-Mbit 256K x 36/512K x 18 Pipelined SRAM Functional Description[1] Features • Supports bus operation up to 225 MHz • Available speed grades are 225, 200 and 166 MHz • Registered inputs and outputs for pipelined operation • 3.3V core power supply


    Original
    PDF CY7C1360B CY7C1362B 36/512K 225-MHz 200-MHz 166-MHz CY7C1360B/CY7C1362B CY7C1360B CY7C1362B

    Untitled

    Abstract: No abstract text available
    Text: 1CY7C1329 CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM Features • • • • • • • • • • • • • • • • • • and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining


    Original
    PDF 1CY7C1329 CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 36/512K

    Untitled

    Abstract: No abstract text available
    Text: CY7C1360C, CY7C1362C 9-Mbit 256 K x 36/512 K × 18 Pipelined SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined SRAM Functional Description Features • Supports bus operation up to 200 MHz ■ Available speed grades: 200 MHz, and 166 MHz ■ Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1360C, CY7C1362C

    Untitled

    Abstract: No abstract text available
    Text: CY7C1360C, CY7C1362C 9-Mbit 256 K x 36/512 K × 18 Pipelined SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades: 200 MHz, and 166 MHz ■ Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1360C, CY7C1362C CY7C1360C/CY7C1362C

    Untitled

    Abstract: No abstract text available
    Text: CY7C1360C, CY7C1362C 9-Mbit 256 K x 36/512 K × 18 Pipelined SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined SRAM Features Functional Description • Supports bus operation up to 250 MHz ■ Available speed grades: 250, 200, and 166 MHz ■ Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1360C, CY7C1362C CY7C1360C/CY7C1362C

    CY7C1360C

    Abstract: CY7C1362C
    Text: CY7C1360C, CY7C1362C 9-Mbit 256 K x 36/512 K × 18 Pipelined SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined SRAM Features Functional Description n Supports bus operation up to 250 MHz n Available speed grades: 250, 200, and 166 MHz n Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1360C, CY7C1362C CY7C1360C CY7C1362C

    CY7C1360C

    Abstract: CY7C1362C
    Text: CY7C1360C CY7C1362C 9-Mbit 256K x 36/512K x 18 Pipelined SRAM Functional Description[1] Features • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 166 MHz Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1360C CY7C1362C 36/512K 250-MHz 200-MHz 166-MHz 250MHz CY7C1360C CY7C1362C

    Untitled

    Abstract: No abstract text available
    Text: CY7C1360C, CY7C1362C 9-Mbit 256 K x 36/512 K × 18 Pipelined SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined SRAM Features Functional Description • Supports bus operation up to 200 MHz ■ Available speed grades: 200, and 166 MHz ■ Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1360C, CY7C1362C CY7C1360C/CY7C1362C

    CY7C1360C

    Abstract: CY7C1362C
    Text: CY7C1360C CY7C1362C 9-Mbit 256K x 36/512K x 18 Pipelined SRAM Functional Description[1] Features • • • • • • • • • • • • Supports bus operation up to 250 MHz Available speed grades are 250, 200, and 166 MHz Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1360C CY7C1362C 36/512K 250-MHz 100-Pin CY7C1360C CY7C1362C

    intel 80.82

    Abstract: CY7C1360
    Text: CY7C1360V25 CY7C1362V25 PRELIMINARY 256K x 36 / 512K x 18 Synchronous Pipelined SRAM Features • Supports 200-MHz bus • Fully registered inputs and outputs for pipelined operation • Single 2.5V power supply • Fast clock-to-output times — 3.1 ns for 200-MHz device


    Original
    PDF CY7C1360V25 CY7C1362V25 200-MHz 166-MHz 133-MHz 100-MHz 100-pin intel 80.82 CY7C1360

    CY7C1360A1-150AC

    Abstract: CY7C1362A1 GVT71512DA18
    Text: CY7C1360A1/GVT71256DA36 CY7C1362A1/GVT71512DA18 PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM eral circuitry and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining


    Original
    PDF CY7C1360A1/GVT71256DA36 CY7C1362A1/GVT71512DA18 36/512K CY7C1360A1-150AC CY7C1362A1 GVT71512DA18

    GVT71256D36B-5

    Abstract: CY7C1362A GVT71512D18 7c136
    Text: 1CY7C1329 CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 PRELIMINARY 256K x 36/512K x 18 Pipelined SRAM Features • • • • • • • • • • • • • • • • • • and a 2-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input CLK . The synchronous inputs include all addresses, all data inputs, address-pipelining


    Original
    PDF 1CY7C1329 CY7C1360A/GVT71256D36 CY7C1362A/GVT71512D18 36/512K GVT71256D36B-5 CY7C1362A GVT71512D18 7c136

    CY7C1360V25

    Abstract: CY7C1362V25 CY7C1364V25
    Text: 329 CY7C1360V25 CY7C1362V25 CY7C1364V25 PRELIMINARY 256K x 36/256K x 32/512K x 18 Pipelined SRAM Features • Supports 200-MHz bus • Fully registered inputs and outputs for pipelined operation • Single 2.5V power supply • Fast clock-to-output times — 3.1 ns for 200-MHz device


    Original
    PDF CY7C1360V25 CY7C1362V25 CY7C1364V25 36/256K 32/512K 200-MHz 166-MHz 133-MHz 100-MHz CY7C1360V25 CY7C1362V25 CY7C1364V25

    CY7C1360A

    Abstract: CY7C1362A 1362A
    Text: CY7C1360A CY7C1362A 256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Features • • • • • • • • • • • • • • • • • • Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns Fast clock speed: 225, 200, 166, and 150 MHz Fast OE access times: 2.5 ns, 3.0 ns, and 3.5 ns


    Original
    PDF CY7C1360A CY7C1362A 36/512K CY7C1360A CY7C1362A 1362A

    CY7C1360A

    Abstract: CY7C1362A
    Text: CY7C1360A CY7C1362A 256K x 36/512K x 18 Synchronous Pipelined Burst SRAM Features • • • • • • • • • • • • • • • • • • Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns Fast clock speed: 225, 200, 166, and 150 MHz Fast OE access times: 2.5 ns, 3.0 ns, and 3.5 ns


    Original
    PDF CY7C1360A CY7C1362A 36/512K CY7C1360A CY7C1362A

    CY7C1360

    Abstract: CY7C1360V25 CY7C1362V25
    Text: V CYPRESS CY7C1360V25 CY7C1362V25 PRELIMINARY 256K x36/512K x 18Synchronous Pipelined SRAM Features • Supports 200-M Hz bus • Fully registered inputs and outputs for pipelined oper­ ation All synchronous inputs pass through input registers controlled


    OCR Scan
    PDF CY7C1360V25 CY7C1362V25 256Kx36/512Kx18SynchronousPipelined 200-MHz 166-MHz 133-MHz 100-MHz 100-pin CY7C1360V25 CY7C1360 CY7C1362V25