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Catalog Datasheet	MFG & Type	PDF	Document Tags
Untitled Abstract: No abstract text available Text: EM47EM0888SBA Revision History Revision 0.1 Oct. 2011 -First release. Revision 0.2 (Apr. 2012) - Update package dimension to 8 x 10.5 mm2. Revision 0.3 (Sep. 2013) - Add package dimension 7.5 x 10.6 mm2. Revision 0.4 (Mar. 2014) - Add DDR3 speed 1866. Revision 0.5 (Jul. 2014)	Original	PDF	EM47EM0888SBA 78Ball-FBGA
Untitled Abstract: No abstract text available Text: EM47FM0888MBA 4Gb 64Mx8Bank×8 Double DATA RATE 3 low voltage SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.35V(1.283-1.45V) • All inputs and outputs are compatible with SSTL_15 interface. • Fully differential clock inputs (CK, /CK) operation.	Original	PDF	EM47FM0888MBA 78Ball-FBGA
EM47FM0888SBA Abstract: No abstract text available Text: EM47FM0888SBA 4Gb 64Mx8Bank×8 Double DATA RATE 3 low voltage SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V • All inputs and outputs are compatible with SSTL_15 interface. • Fully differential clock inputs (CK, /CK) operation.	Original	PDF	EM47FM0888SBA 78Ball-FBGA EM47FM0888SBA
Untitled Abstract: No abstract text available Text: EM47EM0888SBA Revision History Revision 0.1 Oct. 2011 -First release. Revision 0.2 (Apr. 2012) - Package dimension change – delete 9 x 10.5 mm2, add 8 x 10.5 mm2. Apr. 2012 1/39 www.eorex.com EM47EM0888SBA 2Gb (32Mx8Bank×8) Double DATA RATE 3 SDRAM Features	Original	PDF	EM47EM0888SBA 78Ball-FBGA
EM47FM0888MBA Abstract: No abstract text available Text: EM47FM0888MBA 4Gb 64Mx8Bank×8 Double DATA RATE 3 low voltage SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.35V(1.283-1.45V) • All inputs and outputs are compatible with SSTL_15 interface. • Fully differential clock inputs (CK, /CK) operation.	Original	PDF	EM47FM0888MBA 78Ball-FBGA EM47FM0888MBA
FBGA78 Abstract: 78 ball fbga EM47EM0888SBA-150E Text: EM47EM0888SBA Revision History Revision 0.1 Oct. 2011 -First release. Oct. 2011 1/39 www.eorex.com EM47EM0888SBA 2Gb (32Mx8Bank×8) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V. • All inputs and outputs are compatible with SSTL_15	Original	PDF	EM47EM0888SBA 78Ball-FBGA FBGA78 78 ball fbga EM47EM0888SBA-150E
Untitled Abstract: No abstract text available Text: EM47DM0888SBA Revision History Revision 0.1 May. 2011 -First release. May. 2011 1/39 www.eorex.com EM47DM0888SBA 1Gb (16Mx8Bank×8) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V 0.075V. • All inputs and outputs are compatible with SSTL_15	Original	PDF	EM47DM0888SBA 78Ball-FBGA
EM47DM0888SBA Abstract: No abstract text available Text: EM47DM0888SBA Revision History Revision 0.1 May. 2011 -First release. Revision 0.2 (Oct. 2014) -Update package size to 8x10.5mm. Oct. 2014 1/39 www.eorex.com EM47DM0888SBA 1Gb (16Mx8Bank×8) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V.	Original	PDF	EM47DM0888SBA 78Ball-FBGA EM47DM0888SBA