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Texas Instruments LP2994MX-NOPB IC REG CONV DDR 1OUT 8SOIC
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LP2994MX Datasheets (3)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
LP2994MX		National Semiconductor	LP2994 DDR Termination Regulator; Package: SOIC NARROW; No of Pins: 8		Original	PDF
LP2994MX		National Semiconductor	DDR Termination Regulator		Original	PDF
LP2994MX/NOPB		Texas Instruments	PMIC - Voltage Regulators - Special Purpose, Integrated Circuits (ICs), IC REGULATOR DDR TERM 8-SOIC		Original	PDF

LP2994MX Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
Untitled Abstract: No abstract text available Text: Obsolete Device LP2994 LP2994 DDR Termination Regulator Literature Number: SNVS202B March 28, 2011 LP2994 DDR Termination Regulator General Description Features The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications Series Stub Termination Logic for active termination of DDRSDRAM. The device utilizes an internal operational amplifier	Original	PDF	LP2994 LP2994 SNVS202B
LP2994 Abstract: LP2994M LP2994MX M08A Text: LP2994 DDR Termination Regulator General Description Features The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications Series Stub Termination Logic for active termination of DDRSDRAM. The device utilizes an internal operational amplifier	Original	PDF	LP2994 LP2994 LP2994M LP2994MX M08A
Untitled Abstract: No abstract text available Text: LP2994 LP2994 DDR Termination Regulator Literature Number: SNVS202B LP2994 DDR Termination Regulator General Description Features The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications Series Stub Termination Logic for active termination of DDRSDRAM. The device utilizes an internal operational amplifier	Original	PDF	LP2994 LP2994 SNVS202B
LP2994 Abstract: LP2994M LP2994MX M08A Text: LP2994 DDR Termination Regulator General Description Features The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications Series Stub Termination Logic for active termination of DDRSDRAM. The device utilizes an internal operational amplifier	Original	PDF	LP2994 LP2994 CSP-9-111S2) CSP-9-111S2. LP2994M LP2994MX M08A