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    LVCH36501A

    Abstract: No abstract text available
    Text: 3.3V CMOS 36-BIT REGISTERED TRANSCEIVER WITH 5 VOLT TOLERANT I/O LVCH36501A ADVANCE INFORMATION Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Common features: – Typical tSK o (Output Skew) < 250ps – ESD > 2000V per MIL-STD-883, Method 3015;


    Original     		36-BIT IDT74LVCH36501A 250ps MIL-STD-883, 200pF, LVCH36501A: 36-bit BF-120) LVCH36501A PDF

    Untitled

    Abstract: No abstract text available
    Text: 3.3V C M O S 36-BI T REGISTERED TRANSCEIVER WI TH 5 V O L T T O L E R A N T I/O IDT74LVCH36501 A ADVANCE INFORMATION FEATURES: DESCRIPTION: • C o m m o n features: These 36-bit registered transceivers are built using ad­ vanced dual metal CMOS technology. These high-speed, low


    OCR Scan     		36-BI IDT74LVCH36501 36-bit PDF

    Untitled

    Abstract: No abstract text available
    Text: 3.3V CMOS 36-BIT REGISTERED TRANSCEIVER WITH 5 VOLT TOLERANT I/O LVCH36501A IDT74LVCH362501A ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: These 36-bit registered transceivers are built using ad­ vanced dual metal CMOS technology. These high-speed, low


    OCR Scan     		36-BIT IDT74LVCH36501A IDT74LVCH362501A 250ps MIL-STD-883, 200pF, MaSS771 PDF