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    M54HCT00F1R Search Results

    M54HCT00F1R Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    M54HCT00F1R STMicroelectronics QUAD 2-INPUT NAND GATE Original PDF

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    pin diagram of ic 74ls00

    Abstract: M74HCT00B1 74LS00 gate diagram M74HCT00 74LS00 IC 74LS00 M54HCT00 M54HCT00F1R 74HCT00 M74HCT00C1R
    Text: M54HCT00 M74HCT00 QUAD 2-INPUT NAND GATE . . . . . . . HIGH SPEED tPD = 12 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUTS DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS


    Original     		PDF M54HCT00 M74HCT00 54/74LS00 M54/74HCT00 pin diagram of ic 74ls00 M74HCT00B1 74LS00 gate diagram M74HCT00 74LS00 IC 74LS00 M54HCT00 M54HCT00F1R 74HCT00 M74HCT00C1R

    pin diagram of ic 74ls00

    Abstract: 74LS00 gate diagram 74LS00 circuit diagram with voltage 74LS00 CMOS M74HCT00 74LS00 M54HCT00 M54HCT00F1R 74ls00 circuit diagram M74HCT00C1R
    Text: M54HCT00 M74HCT00 QUAD 2-INPUT NAND GATE . . . . . . . HIGH SPEED tPD = 12 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUTS DRIVE CAPABILITY 10 LSTTL LOADS BALANCED PROPAGATION DELAYS


    Original     		PDF M54HCT00 M74HCT00 54/74LS00 M54/74HCT00 pin diagram of ic 74ls00 74LS00 gate diagram 74LS00 circuit diagram with voltage 74LS00 CMOS M74HCT00 74LS00 M54HCT00 M54HCT00F1R 74ls00 circuit diagram M74HCT00C1R