MT56C0B18 Search Results

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Abstract: 74LS373 PIN CONFIGURATION AND SPECIFICATIONS
Text: M IC R O N MT56C0818 DUAL 4 K x 1 8 SRAM, SINGLE 8K x 18 SRAM CACHE DATA SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 18 SRAM s with common ad dresses and data; also configurable as a single 8K x 18 SRAM • Built-in input ad dress latches