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    PHASE LOCKED LOOP (PLL) MODULES Search Results

    PHASE LOCKED LOOP (PLL) MODULES Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TPD4207F Toshiba Electronic Devices & Storage Corporation Intelligent power device 600V (High voltage PWM DC brushless motor driver) Visit Toshiba Electronic Devices & Storage Corporation
    TPD4204F Toshiba Electronic Devices & Storage Corporation Intelligent power device 600V (High voltage PWM DC brushless motor driver) Visit Toshiba Electronic Devices & Storage Corporation
    TPD4162F Toshiba Electronic Devices & Storage Corporation Intelligent power device 600V (High voltage PWM DC brushless motor driver) Visit Toshiba Electronic Devices & Storage Corporation
    TPD4206F Toshiba Electronic Devices & Storage Corporation Intelligent power device 500V (High voltage PWM DC brushless motor driver) Visit Toshiba Electronic Devices & Storage Corporation
    TB67B001BFTG Toshiba Electronic Devices & Storage Corporation Brushless Motor Driver/3 Phases Driver/Vout(V)=25/Iout(A)=3/Square Wave Visit Toshiba Electronic Devices & Storage Corporation

    PHASE LOCKED LOOP (PLL) MODULES Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    M2010

    Abstract: M2011 "Voltage Controlled Oscillators" M2015 M2016 flurocarbon plastic PHASE LOCKED LOOP
    Text: FULL SIZE D.I.L. M2010, M2015 M2011, M2016 VOLTAGE CONTROLLED OSCILLATORS HCMOS, 0° TO 70°C Phase-Locked Oscillator, 5V 10 MHz – 32.768 MHz Phase Locked Loop Oscillator These PLL sub-systems incorporate all the components required for phase locked loop


    Original     		M2010, M2015 M2011, M2016 NY10801 M2010 M2011 "Voltage Controlled Oscillators" M2015 M2016 flurocarbon plastic PHASE LOCKED LOOP PDF

    alt_iobuf

    Abstract: receiver altLVDS working of pll in integrated circuit pdf document for phase Locked Loop pll lock time vhdl code for loop filter of digital PLL vhdl code for phase frequency detector for FPGA EP1S10F780C5 EP1S10F780
    Text: Phase-Locked Loop ALTPLL Megafunction User Guide UG-ALTPLL-8.0 November 2009 Introduction The Phase-Locked Loop (PLL) is a closed-loop frequency-control system that compares the phase difference between the input signal and the output signal of a voltage-controlled oscillator (VCO). The negative feedback loop of the system forces


    Original     		PDF

    free vhdl code for pll

    Abstract: CPMC440CLK DS622 UG190 virtex 5 ppc real virtex 5 fpga utilization
    Text: Phase Locked Loop PLL Module(v1.00a) DS622 April 10, 2008 Product Specification Introduction LogiCORE Facts The Phase Locked Loop primitive in Virtex-5FXT parts is used to generate multiple clocks with defined phase and frequency relationships to a given input clock. The Phase


    Original     		DS622 UG190 free vhdl code for pll CPMC440CLK virtex 5 ppc real virtex 5 fpga utilization PDF

    Untitled

    Abstract: No abstract text available
    Text: PI6C2402 Phase-Locked Loop Clock Driver Features Description • Clock doubler The PI6C2402 features a low-skew, low-jitter, Phase-Locked Loop PLL clock driver. By connecting the feedback CLK_OUT output to the feedback FB_IN input, the propagation delay from the


    Original     		PI6C2402 PI6C2402 150ps PI6C2402WE 150-mil PS8418I PDF

    PI6C2402

    Abstract: No abstract text available
    Text: PI6C2402 Phase-Locked Loop Clock Driver Features Description • Clock doubler The PI6C2402 features a low-skew, low-jitter, Phase-Locked Loop PLL clock driver. By connecting the feedback CLK_OUT output to the feedback FB_IN input, the propagation delay from the


    Original     		PI6C2402 PI6C2402 150ps usin196 PI6C2402WE 150-mil PS8418I PDF

    PI6C2402

    Abstract: PI6C2402W
    Text: PI6C2402 Phase-Locked Loop Clock Driver Features Description • Clock doubler The PI6C2402 features a low-skew, low-jitter, Phase-Locked Loop PLL clock driver. By connecting the feedback CLK_OUT output to the feedback FB_IN input, the propagation delay from the


    Original     		PI6C2402 PI6C2402 150ps PI6C2402W 150-mil PI6C2402WE PI6C2402WI PI6C2402W PDF

    100khz VCO

    Abstract: No abstract text available
    Text: PLL350-1590Y PLL3501590Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL350, 20.32mm x 14.78mm x 3.91mm PLL Synthesizer Block Diagram Features    Low Phase Noise / Fast Settling Time RF Feedback SPI Bus Compatible PLL IC


    Original     		PLL3501590Y5V PLL350-1590Y PLL350, 1560MHz 1620MHz S1170 582in 154in) DS120109 100khz VCO PDF

    PLL350-2444

    Abstract: No abstract text available
    Text: PLL350-2444Y PLL3502444Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL350, 20.32mm x 14.78mm x 3.91mm PLL Synthesizer Block Diagram Features    Low Phase Noise / Fast Settling Time RF Feedback SPI Bus Compatible PLL IC


    Original     		PLL3502444Y5V PLL350-2444Y PLL350, 2344MHz 2544MHz S1170 582in 154in) bu-145 DS120109 PLL350-2444 PDF

    cmos vco ic

    Abstract: No abstract text available
    Text: PLL350-1960Y PLL3501960Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL350, 20.32mm x 14.78mm x 3.91mm PLL Synthesizer Block Diagram Features    Low Phase Noise / Fast Settling Time RF Feedback SPI Bus Compatible PLL IC


    Original     		PLL3501960Y5V PLL350-1960Y PLL350, 1930MHz 1990MHz S1170 582in 154in) DS120109 cmos vco ic PDF

    1090mhz oscillator

    Abstract: No abstract text available
    Text: PLL350-1120Y PLL3501120Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL350, 20.32mm x 14.78mm x 3.91mm PLL Synthesizer Block Diagram Features    Low Phase Noise / Fast Settling Time RF Feedback SPI Bus Compatible PLL IC


    Original     		PLL3501120Y5V PLL350-1120Y PLL350, 1090MHz 1150MHz S1170 582in 154in) DS120109 1090mhz oscillator PDF

    Untitled

    Abstract: No abstract text available
    Text: PI6C2402 Phase-Locked Loop Clock Driver Features Description • 2X CLK_IN on CLK_OUT The PI6C2402 features a low-skew, low-jitter, phase-locked loop PLL clock driver. By connecting the feedback CLK_OUT output to the feedback FB_IN input, the propagation delay from the


    Original     		PI6C2402 100ps PI6C2402 PI6C2402W PI6C2402WE 150-mil PS8418F PDF

    Untitled

    Abstract: No abstract text available
    Text: PI6C2402 Phase-Locked Loop Clock Driver Features Description • 2X CLK_IN on CLK_OUT The PI6C2402 features a low-skew, low-jitter, phase-locked loop PLL clock driver. By connecting the feedback CLK_OUT output to the feedback FB_IN input, the propagation delay from the


    Original     		PI6C2402 PI6C2402 100ps PI6C2402W 150-mil PI6C2402WE PS8418E PDF

    Untitled

    Abstract: No abstract text available
    Text: PI6C2402 Phase-Locked Loop Clock Driver Features Description • 2X CLK_IN on CLK_OUT The PI6C2402 features a low-skew, low-jitter, phase-locked loop PLL clock driver. By connecting the feedback CLK_OUT output to the feedback FB_IN input, the propagation delay from the


    Original     		PI6C2402 PI6C2402 100ps PI6C2402W 150-mil PI6C2402WE PS8418D PDF

    Untitled

    Abstract: No abstract text available
    Text: PLL350-265Y PLL350-265Y 5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL350, 20.32mm x 14.78mm x 3.91mm PLL Synthesizer Block Diagram Features  Low Phase Noise / Fast Settling Time RF Feedback PLL IC  SPI Bus Compatible 


    Original     		PLL350-265Y PLL350-265Y PLL350, 264MHz 266MHz S1170 582in 154in) DS120109 PDF

    Untitled

    Abstract: No abstract text available
    Text: PLL350-1842Y PLL3501842Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL350, 20.32mm x 14.78mm x 3.91mm PLL Synthesizer Block Diagram Features  Low Phase Noise / Fast Settling Time  SPI Bus Compatible  Frequency: 1805MHz to


    Original     		PLL350-1842Y PLL3501842Y5V PLL350, 1805MHz 1880MHz S1170 582in 154in) DS120109 PDF

    Untitled

    Abstract: No abstract text available
    Text: PLL400-1950AY PLL4001950AY5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL400, 15.24mm x 15.24mm x 3mm PLL Synthesizer Block Diagram Features  Low Phase Noise / Fast Settling Time  SPI Bus Compatible  Frequency: 1900MHz to


    Original     		PLL400-1950AY PLL4001950AY5V PLL400, S1170 118in) 1900MHz 2000MHz DS120109 PDF

    Untitled

    Abstract: No abstract text available
    Text: PLL350-1260Y PLL3501260Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL350, 20.32mm x 14.78mm x 3.91mm PLL Synthesizer Block Diagram Features  Low Phase Noise / Fast Settling Time  SPI Bus Compatible  Frequency: 1230MHz to


    Original     		PLL350-1260Y PLL3501260Y5V PLL350, 1230MHz 1290MHz S1170 582in 154in) DS120109 PDF

    Untitled

    Abstract: No abstract text available
    Text: PLL350-2444Y PLL3502444Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL350, 20.32mm x 14.78mm x 3.91mm PLL Synthesizer Block Diagram Features  Low Phase Noise / Fast Settling Time  SPI Bus Compatible  Frequency: 2344MHz to


    Original     		PLL350-2444Y PLL3502444Y5V PLL350, 2344MHz 2544MHz S1170 582in 154in) DS120109 PDF

    AL-N11

    Abstract: C6000 SPRU189 SPRU190 TMS320C6000 ALN11 sys10 ALN10
    Text: TMS320TCI648x DSP Software-Programmable Phase-Locked Loop PLL Controller User's Guide Literature Number: SPRU806 December 2005 2 SPRU806 – December 2005 Contents Preface . 5


    Original     		TMS320TCI648x SPRU806 AL-N11 C6000 SPRU189 SPRU190 TMS320C6000 ALN11 sys10 ALN10 PDF

    Untitled

    Abstract: No abstract text available
    Text: PLL400-1550Y PLL4001550Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL400, 15.24mm x 15.24mm x 3mm PLL Synthesizer Block Diagram Features  Low Phase Noise / Fast Settling Time Reference In Data, Clock, Enable, LD RF Feedback


    Original     		PLL400-1550Y PLL4001550Y5V PLL400, 1510MHz 1590MHz S1170 118in) DS120109 PDF

    Untitled

    Abstract: No abstract text available
    Text: PLL350-1120Y PLL3501120Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL350, 20.32mm x 14.78mm x 3.91mm PLL Synthesizer Block Diagram Features  Low Phase Noise / Fast Settling Time Reference In Data, Clock, Enable, LD RF Feedback


    Original     		PLL350-1120Y PLL3501120Y5V PLL350, 1090MHz 1150MHz S1170 582in 154in) DS120109 PDF

    Untitled

    Abstract: No abstract text available
    Text: PLL350-1590Y PLL3501590Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL350, 20.32mm x 14.78mm x 3.91mm PLL Synthesizer Block Diagram Features  Low Phase Noise / Fast Settling Time  SPI Bus Compatible  Frequency: 1560MHz to


    Original     		PLL350-1590Y PLL3501590Y5V PLL350, 1560MHz 1620MHz S1170 582in 154in) DS120109 PDF

    Untitled

    Abstract: No abstract text available
    Text: PLL400-1500Y PLL4001500Y5V NARROWBAND PHASELOCKED LOOP 5V NARROWBAND PHASE-LOCKED LOOP Package: PLL400, 15.24mm x 15.24mm x 3mm PLL Synthesizer Block Diagram Features  Low Phase Noise / Fast Settling Time  SPI Bus Compatible  Frequency: 1450MHz to


    Original     		PLL400-1500Y PLL4001500Y5V PLL400, 1450MHz 1550MHz S1170 118in) DS120109 PDF

    C6000

    Abstract: TMS320C6000 0R015 SPRU733
    Text: TMS320C672x DSP Software-Programmable Phase-Locked Loop PLL Controller Reference Guide Literature Number: SPRU879A May 2005 2 SPRU879A – May 2005 Contents Preface . 5


    Original     		TMS320C672x SPRU879A C6000 TMS320C6000 0R015 SPRU733 PDF