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    M6569

    Abstract: P883
    Text: M65697 256 K  1 Very Low Power CMOS SRAM Introduction The M65697 is a very low power CMOS static RAM organized as 262144 x 1 bit. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


    Original     		M65697 M65697 65697E SCC9301038) M6569 P883 PDF

    P883

    Abstract: HM-65664AB hm65664a 65664ab HM-65664
    Text: HM 65664A 8 K  8 Very Low Power CMOS SRAM Introduction The HM 65664A is a very low power CMOS static RAM organized as 8192 x 8 bit. It is manufactured using the TEMIC high performance CMOS technology named super CMOS. current typical value = 0.1 µA with a fast access time at


    Original     		5664A 5664A 65664F SCC9301029) P883 HM-65664AB hm65664a 65664ab HM-65664 PDF

    M54HC164

    Abstract: M54HC164D M54HC164K M54HC164K1
    Text: M54HC164 RAD-HARD 8 BIT SIPO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 62MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		M54HC164 62MHz SCC-9306-041 M54HC164 M54HC164D M54HC164K M54HC164K1 PDF

    M54HC165

    Abstract: M54HC165D M54HC165D1 M54HC165K M54HC165K1
    Text: M54HC165 RAD-HARD 8 BIT PISO SHIFT REGISTER • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 15ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		M54HC165 SCC-9306-042 M54HC165 M54HC165D M54HC165D1 M54HC165K M54HC165K1 PDF

    FP24-500

    Abstract: P883 HM65687A
    Text: HM65687A 64 K  1 Very Low Power CMOS SRAM Introduction The HM65687A is a very low power CMOS static RAM organized as 65536 x 1 bit. It is manufactured using the TEMIC high performance CMOS technology named super CMOS. current typical value = 0.1 µA with a fast access time at


    Original     		HM65687A HM65687A 65687E SCC9301026) FP24-500 P883 PDF

    M54HC595

    Abstract: M54HC595D M54HC595K M54HC595K1 SCC-9306-051
    Text: M54HC595 RAD-HARD 8 BIT SHIFT REGISTER WITH OUTPUT LATCHES 3 STATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 59MHz (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)


    Original     		M54HC595 59MHz SCC-9306-051 M54HC595 M54HC595D M54HC595K M54HC595K1 SCC-9306-051 PDF

    M672

    Abstract: P883 M67203
    Text: M67203/M67204 2 K  9 & 4 K  9 CMOS Parallel FIFO Introduction The M67203/204 implement a first-in first-out algorithm, featuring asynchronous read/write operations. The FULL and EMPTY flags prevent data overflow and underflow. The Expansion logic allows unlimited expansion in word


    Original     		M67203/M67204 M67203/204 SMD5962 67204E M672 P883 M67203 PDF

    P883

    Abstract: M672
    Text: M67201A/M67202A 512  9 & 1 K  9 CMOS Parallel FIFO Introduction The M67201A/202A implement a first-in first-out algorithm, featuring asynchronous read/write operations. The FULL and EMPTY flags prevent data overflow and underflow. The Expansion logic allows unlimited


    Original     		M67201A/M67202A M67201A/202A af9536) 67202F SCC9301032) P883 M672 PDF

    M54HC109

    Abstract: M54HC109D M54HC109D1 M54HC109K SCC-9306-048
    Text: M54HC109 RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : fMAX = 67MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:


    Original     		M54HC109 67MHz SCC-9306-048 M54HC109 M54HC109D M54HC109D1 M54HC109K SCC-9306-048 PDF

    TRANSISTOR B737

    Abstract: MD80C31 smd TRANSISTOR code marking 8K 67202FV PGA300 5962-8506401MQA ERC32SIM marking code RAD SMD Transistor npn ISO DIMENSIONAL certificate formats 67205E
    Text: Integrated Circuits for Aerospace and Defense Short Form 1998 16 June 1998 Publisher: TEMIC Semiconductors La Chantrerie BP 70602 44306 Nantes Cedex 03 FRANCE Fax: +33 2 40 18 19 60 E:mail [email protected] World Wide Web: http://www.temic.de 16 June 1998


    Original     		PDF

    67132E

    Abstract: M67132
    Text: M67132/M67142 2 K  8 CMOS Dual Port RAM Description The M67132/67142 are very low power CMOS dual port static RAMs organized as 2048 x 8. They are designed to be used as a stand-alone 8 bit dual port RAM or as a combination MASTER/SLAVE dual port for 16 bits or


    Original     		M67132/M67142 M67132/67142 SMD5962 67142E SCC9301033) 67132E M67132 PDF

    67024E

    Abstract: M67024 j-cerquad 84 100-PIN Shared resource arbitration
    Text: M67024 4 K  16 CMOS Dual Port RAM Introduction The M67024 is a very low power CMOS dual port static RAM organised as 4096 x 16. The M67024 is designed to be used as a stand-alone 16 bit dual port RAM or as a combination MASTER/SLAVE dual port for 32 bit or


    Original     		M67024 M67024 67024E SCC9301034) 67024E j-cerquad 84 100-PIN Shared resource arbitration PDF

    M65656

    Abstract: 65656 P883
    Text: M65656 32 K  8 Very Low Power CMOS SRAM Introduction The M65656 is a very low power CMOS static RAM organized as 32768 x 8 bits. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


    Original     		M65656 M65656 65656F/G SCC9301030) 65656 P883 PDF

    C8450

    Abstract: 952100201 100203
    Text: T em ic see S em ico n d u cto rs SCC Reference List ESA/SCC Specifications SCC Number Features TEMIC Fart Number Package S C C 930I01501 85 ns 50 u A 2K x8 SR A M H M C -6 5 1 6 2 E S C C 930Ì01502 85 ns 5 0 p A 2Kx8 SR A M H M 4 -6 5 Í6 2 E LCC32 S C C 930101503


    OCR Scan     		930I01501 SCC9301015 LCC32 65262E 4--65262EB LCC44 C8450 952100201 100203 PDF

    Untitled

    Abstract: No abstract text available
    Text: Temic M65697 Semiconductors 256 K X 1 Very Low Power CMOS SRAM Introduction The M65697 is a very low power CMOS static RAM organized as 262144 x 1 bit. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


    OCR Scan     		M65697 M65697 00Q7420 PDF

    M67132

    Abstract: No abstract text available
    Text: Temic Semiconductors 2 K x 8 CMOS Dual Port RAM M67132/M67142 Description The M67132/67142 are very low power CMOS dual port static RAMs organized as 2048 x 8. They are designed to be used as a stand-alone 8 bit dual port RAM or as a combination MASTER/SLAVE dual port for 16 bits or


    OCR Scan     		m67132/m67142 M67132/67142 SMD5962-87002) SCC9301033) M67132 PDF

    Untitled

    Abstract: No abstract text available
    Text: Tem ic M67132/M67142 Semi co n du ct o rs 2K x 8 CMOS Dual Port RAM Description T he M 67132/67142 are very low pow er CM O S dual port static R A M s organized as 2048 x 8. T hey are designed to be used as a stand-alone 8 bit dual port R A M or as a com bination M A STER /SLA V E dual port for 16 bits or


    OCR Scan     		M67132/M67142 D5962-87002) 67142E SCC930 PDF

    Mascot AS

    Abstract: MASCOT VRL
    Text: Tem ic M65697 Semiconductors 256 K X 1 Very Low Power CMOS SRAM Introduction The M65697 is a very low power CMOS static RAM organized as 262144 x 1 bit. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


    OCR Scan     		M65697 M65697 SCC9301038) Mascot AS MASCOT VRL PDF

    202A

    Abstract: No abstract text available
    Text: Temic M67201A/M67202A S e m i c o n d u c t o r s 512 x 9 & 1 K x 9 CMOS ParaUel FIFO Introduction The M67201A/202A implement a first-in first-out algorithm, featuring asynchronous read/write operations. The FULL and EMPTY flags prevent data overflow and underflow. The Expansion logic allows unlimited


    OCR Scan     		M67201A/M67202A M67201A/202A 202A PDF

    Untitled

    Abstract: No abstract text available
    Text: Temic M67024 S e m i c o n d u c t o r s 4 K x 16 CMOS Dual Port RAM Introduction The M67024 is a very low power CMOS dual port static RAM organised as 4096 x 16. The M67024 is designed to be used as a stand-alone 16 bit dual port RAM or as a combination MASTER/SLAVE dual port for 32 bit or


    OCR Scan     		M67024 M67024 67024E SCC9301034) PDF

    Untitled

    Abstract: No abstract text available
    Text: Tem ic M65656 Semiconductors 32 K X 8 Very Low Power CMOS SRAM Introduction The M65656 is a very low power CMOS static RAM organized as 32768 x 8 bits. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


    OCR Scan     		M65656 M65656 SCC9301030) PDF

    Untitled

    Abstract: No abstract text available
    Text: Temic M65656 Semiconductors 32 K X 8 Very Low Power CMOS SRAM Introduction The M65656 is a very low power CMOS static RAM organized as 32768 x 8 bits. It is manufactured using the TEMIC high performance CMOS technology named SCMOS. With this process, TEMIC is the first to bring the solution


    OCR Scan     		M65656 M65656 bfl45b PDF

    Untitled

    Abstract: No abstract text available
    Text: Temic Semiconductors 2 K x 8 CMOS Dual Port RAM M67132/M67142 Description The M67132/67142 are very low power CMOS dual port static RAMs organized as 2048 x 8. They are designed to be used as a stand-alone 8 bit dual port RAM or as a combination MASTER/SLAVE dual port for 16 bits or


    OCR Scan     		M67132/M67142 M67132/67142 SCC9301033) 67I32E PDF

    RY 485 ESA

    Abstract: No abstract text available
    Text: Temic HM65687A Semiconductors 64 K X 1 Very Low Power CMOS SRAM Introduction The HM65687A is a very low power CMOS static RAM organized as 65536 x 1 bit. It is manufactured using the TEMIC high performance CMOS technology named super CMOS. current typical value = 0.1 |iA with a fast access time at


    OCR Scan     		HM65687A HM65687A Sflbfl45b Q0D74D3 RY 485 ESA PDF