A115-A
Abstract: C101 SN54LV166A SN74LV166A 74lv166
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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SN54LV166A,
SN74LV166A
SCLS456B
000-V
A114-A)
A115-A)
SN54LV166A
A115-A
C101
SN54LV166A
SN74LV166A
74lv166
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
SN74LV166A
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PDF
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A115-A
Abstract: C101 SN54LV166A SN74LV166A
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456B
000-V
A114-A)
A115-A)
SN54LV166A
A115-A
C101
SN54LV166A
SN74LV166A
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
SN54LV166A
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
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PDF
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A115-A
Abstract: C101 SN54LV166A SN74LV166A
Text: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
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Original
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SN54LV166A,
SN74LV166A
SCLS456
000-V
A114-A)
A115-A)
LV166A
SN54LV166A
A115-A
C101
SN54LV166A
SN74LV166A
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
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PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
SN54LV166A
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PDF
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A115-A
Abstract: C101 SN54LV166A SN74LV166A
Text: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456A – FEBRUARY 2001 – REVISED JULY 2003 D D D D D D D D D 2-V to 5.5-V VCC Operation Max tpd of 10.5 ns at 5 V Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)
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Original
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SN54LV166A,
SN74LV166A
SCLS456A
000-V
A114-A)
A115-A)
SN54LV166A
A115-A
C101
SN54LV166A
SN74LV166A
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PDF
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A115-A
Abstract: C101 SN54LV166A SN74LV166A
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
SN54LV166A
A115-A
C101
SN54LV166A
SN74LV166A
|
PDF
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|
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C
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Original
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SN54LV166A,
SN74LV166A
SCLS456
000-V
A114-A)
A115-A)
SN54LV166A
SN74LV166A
SN74LV166ANSR
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PDF
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A115-A
Abstract: C101 SN54LV166A SN74LV166A
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
SN54LV166A
A115-A
C101
SN54LV166A
SN74LV166A
|
PDF
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A115-A
Abstract: C101 SN54LV166A SN74LV166A
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456B
000-V
A114-A)
A115-A)
SN54LV166A
A115-A
C101
SN54LV166A
SN74LV166A
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PDF
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SN74LV166A
Abstract: A115-A C101 SN54LV166A
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
SN54LV166A
SN74LV166A
A115-A
C101
SN54LV166A
|
PDF
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Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
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PDF
|
Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
|
PDF
|
Untitled
Abstract: No abstract text available
Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion
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Original
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SN54LV166A,
SN74LV166A
SCLS456C
000-V
A114-A)
A115-A)
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PDF
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PLL WITH VCO 4046 appli note philips
Abstract: CD74HC4050 marking microstar ms 4011 CI 40106 8952 microcontroller ic 4017 decade counter datasheet ic HC 4066 AG GK 7002 7 SEGMENT DISPLAY LT 543 PIN CONFIGURATION LA 4508 as af power amplifier
Text: LOGIC OVERVIEW 1 PRODUCT INDEX 2 FUNCTIONAL CROSS−REFERENCE 3 DEVICE SELECTION GUIDE 4 PACKAGING AND MARKING INFORMATION A LOGIC PURCHASING TOOL/ALTERNATE SOURCES B LOGIC SELECTION GUIDE FIRST HALF 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,
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PDF
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74LS series logic gates 3 input or gate
Abstract: sn74 series TTL logic gates list 4017 counter IC datasheet data sheet ic 4017 IC CD 4033 pin configuration CMOS Data Book Texas Instruments Incorporated 74LS series logic gates hp 4514 TEXAS INSTRUMENTS SN7400 SERIES ic 4026 down counter
Text: LOGIC OVERVIEW 1 FOCUS ON THE IDEAL LITTLE LOGIC SOLUTION 2 FUNCTIONAL INDEX 3 FUNCTIONAL CROSSĆREFERENCE 4 DEVICE SELECTION GUIDE 5 PACKAGING AND MARKING INFORMATION A LOGIC PURCHASING TOOL/ALTERNATE SOURCES B LOGIC SELECTION GUIDE FIRST HALF 2002 IMPORTANT NOTICE
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Original
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PDF
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hp laptop MOTHERBOARD pcb CIRCUIT diagram
Abstract: hp laptop battery pack pinout SCBD002C hp laptop battery pinout sn74154 SN74LVC1G373 SDFD001B 4052 IC circuit diagram lg crt monitor circuit diagram PLL CD 4046
Text: LOGIC OVERVIEW 1 PRODUCT INDEX 2 FUNCTIONAL CROSS−REFERENCE 3 DEVICE SELECTION GUIDE 4 PACKAGING AND MARKING INFORMATION A LOGIC PURCHASING TOOL/ALTERNATE SOURCES B LOGIC SELECTION GUIDE SECOND HALF 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,
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Original
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PDF
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