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    SN54LV166A Search Results

    SN54LV166A Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SN54LV166A Texas Instruments 8-Bit Parallel-Load Shift Registers Original PDF

    SN54LV166A Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A 74lv166
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456B 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A 74lv166 PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN74LV166A PDF

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456B 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) PDF

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV166A, SN74LV166A SCLS456 000-V A114-A) A115-A) LV166A SN54LV166A A115-A C101 SN54LV166A SN74LV166A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A PDF

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456A – FEBRUARY 2001 – REVISED JULY 2003 D D D D D D D D D 2-V to 5.5-V VCC Operation Max tpd of 10.5 ns at 5 V Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)


    Original     		SN54LV166A, SN74LV166A SCLS456A 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A PDF

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8-BIT PARALLEL-LOAD SHIFT REGISTERS SCLS456 – FEBRUARY 2001 D D D D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C


    Original     		SN54LV166A, SN74LV166A SCLS456 000-V A114-A) A115-A) SN54LV166A SN74LV166A SN74LV166ANSR PDF

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A PDF

    A115-A

    Abstract: C101 SN54LV166A SN74LV166A
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456B − FEBRUARY 2001 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456B 000-V A114-A) A115-A) SN54LV166A A115-A C101 SN54LV166A SN74LV166A PDF

    SN74LV166A

    Abstract: A115-A C101 SN54LV166A
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) SN54LV166A SN74LV166A A115-A C101 SN54LV166A PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LV166A, SN74LV166A 8ĆBIT PARALLELĆLOAD SHIFT REGISTERS SCLS456C − FEBRUARY 2001 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 10.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D D Direct Overriding Clear D Parallel-to-Serial Conversion


    Original     		SN54LV166A, SN74LV166A SCLS456C 000-V A114-A) A115-A) PDF