SL9030
Abstract: VL82C100 a23 ac hen vd VIA SL9030 7a23 sl90 vl82c10 ta 8259 h via flexset
Text: SL9030 Integrated Peripheral Controller PRELIMINARY FEATURES • Pin to Pin Replacement for VLSI VL82C100. • IBM PC/AT Compatible. • Replaces 22 Logic Devices. • Supports up to 20 MHz System Clock. • Seven DMA Channels. • 14 External Interrupt Requests.
|
OCR Scan
|
PDF
|
SL9030
VL82C100.
84-pin
82C37A
82C59A
82C54
74LS612
74ALS373
74ALS138
VL82C100
a23 ac hen vd
VIA SL9030
7a23
sl90
vl82c10
ta 8259 h
via flexset
|
T45 12H
Abstract: memory decoding 80386dx 16 bit sl90 LIM EMS 4.0 N804CS
Text: The FlexSet PC/AT 80386DX System & Memory Controller _ SL9352 PRELIMINARY FEATURES • 100% PC/AT Compatible. • Up to 20 MHz Performance. • ISA Bus Control Logic. • • • • • • Synchronous or Asynchronous System Control Operation.
|
OCR Scan
|
PDF
|
80386DX
SL9352
SL9352
T45 12H
memory decoding 80386dx 16 bit
sl90
LIM EMS 4.0
N804CS
|
T45 12H
Abstract: 80386dx pipeline ROY TODD 80386DX 16 BIT Code T6S intel 80386dx 80386DX NBS16 sl9030 SL903
Text: The FlexSet PC/AT 80386DX System & Memory Controller _ SL9352 PRELIMINARY FEATURES • 100% PC/AT Compatible. • Up to 20 MHz Performance. • ISA Bus Control Logic. • Synchronous or Asynchronous System Control Operation. • Programmable Command Delays.
|
OCR Scan
|
PDF
|
80386DX
SL9352
SL9352
T45 12H
80386dx pipeline
ROY TODD
80386DX 16 BIT
Code T6S
intel 80386dx
NBS16
sl9030
SL903
|
VIA SL9011
Abstract: No abstract text available
Text: The FlexSet PC/AT System Controller SL9011 PRELIMINARY FEATURES • AT System Control Logic. • Supports 80286,80386SX P9 , or 80386DX-based Designs. • Up to 25 MHz Performance. • Clock Switching and Reset Logic. • Programmable Wait States for 8 Bit AT Cycles.
|
OCR Scan
|
PDF
|
SL9011
80386SX
80386DX-based
80387SX,
80387DX
SL9011
VIA SL9011
|
T44A
Abstract: 80286 microprocessor pin out diagram sl9030 t53a 80387SX weitek ti6a 80387DX 80386 microprocessor pin out diagram via flexset
Text: The FlexSet PC/AT System Controller SL9011 PRELIMINARY FEATURES • AT System Control Logic. • Supports 80286, 80386SX P9 , or 80386DX-based Designs. • Up to 25 MHz Performance. • Clock Switching and Reset Logic. • Programmable Wait States for 8 Bit AT Cycles.
|
OCR Scan
|
PDF
|
SL9011
80386SX
80386DX-based
80387SX,
80387DX
SL9011
T44A
80286 microprocessor pin out diagram
sl9030
t53a
80387SX
weitek
ti6a
80386 microprocessor pin out diagram
via flexset
|
T80-T
Abstract: toggle switch t80-t sl9030 LIM EMS 4.0 80387SX de-nor intel 80386sx 80386SX L73H N804CS
Text: The FlexSet PC/AT 80386SX System & M em ory Controller _ SL9252 PRELIMINARY FEATURES • 100% PC/AT Compatible. • Up to 20 MHz Performance. • ISA Bus Control Logic. • Synchronous or Asynchronous System Control Operation.
|
OCR Scan
|
PDF
|
80386SX
SL9252
T80-T
toggle switch t80-t
sl9030
LIM EMS 4.0
80387SX
de-nor
intel 80386sx
L73H
N804CS
|
LIM EMS 4.0
Abstract: 80387
Text: The FlexSet PC/AT 80386SX System & Memory Controller _ SL9252 PRELIMINARY FEATURES • 100% PC/AT Compatible. • Up to 20 MHz Performance. • ISA Bus Control Logic. • • • • • • Synchronous or Asynchronous System Control Operation.
|
OCR Scan
|
PDF
|
80386SX
SL9252
SL9252
LIM EMS 4.0
80387
|
ta 8742 IC
Abstract: 80836DX 80286 mouse 386R sl90 SL9030 SL9010
Text: y/a SL9095 Power M anagement Unit PRELIMINARY FEATURES • Supports 80286, 80386SX, 80386DX, and 80486 Page Mode or Cache-based Laptop designs. • IBM PC/AT Compatible. • Software Programmable Power Management Unit. Provides Individual On/Off Control. • Compatible with all CPU Clock Rates.
|
OCR Scan
|
PDF
|
SL9095
80386SX,
80386DX,
NBMW9250
NBMW9250.
SL9095
MS2805
CLK9010D2
ta 8742 IC
80836DX
80286 mouse
386R
sl90
SL9030
SL9010
|
VIA SL9030
Abstract: 80386SX core logic SL9025 313233 sl90 SL9030 PG52
Text: y/ a SL9025 Address Controller PRELIMINARY FEATURES • Supports 80286,80386SX P9 , 80386DX, and 80486-based AT Designs. • Address In to Address Out: 15 ns. • Up to 25 MHz Performance. • 24 mA Buffers. • Include SA & XA Buffers. • Includes XD to XA Transfer Latches.
|
OCR Scan
|
PDF
|
SL9025
80386SX
80386DX,
80486-based
80386SX,
80386DX
SL9025
VIA SL9030
80386SX core logic
313233
sl90
SL9030
PG52
|
block diagram of 80386dx microprocessor
Abstract: 80486 microprocessor pin out diagram sl90 SL9030 via flexset VIA SL9020 SL9020
Text: y/ a SL9020 Data Controller PRELIMINARY FEATURES • Supports 80286,80386SX, 80386DX, and 80486-based AT Designs. • Data In to Data Out: 15 ns. • 24 mA Output Buffers for SD Bus. • Includes MD, SD & XD Buffers. • 16 bit Data Path can be Used as Low or High Buffer.
|
OCR Scan
|
PDF
|
SL9020
80386SX,
80386DX,
80486-based
80386SX
SL9020
block diagram of 80386dx microprocessor
80486 microprocessor pin out diagram
sl90
SL9030
via flexset
VIA SL9020
|
weitek
Abstract: 80387DX sl9350 t46a 80X87 INTEL HT39A refresh logic sl90 t53a SL9030
Text: y/ à SL9011 System Controller PRELIMINARY FEATURES • AT System Control Logic. • Supports 80286,80386SX P9 , or 80386DX-based Designs. • Up to 25 MHz Performance. • Clock Switching and Reset Logic. • Programmable Wait States for 8 Bit AT Cycles.
|
OCR Scan
|
PDF
|
SL9011
80386SX
80386DX-based
80387SX,
80387DX
--t58a
NRDY32
t59--
weitek
sl9350
t46a
80X87 INTEL
HT39A
refresh logic
sl90
t53a
SL9030
|