74ACT11086
Abstract: 4bti
Text: 54ACT11086, 74ACT11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES TI0185— D3390, NOVEM BER 1989 • Inputs are TTL-Voltage Compatible 54ACT11086 . . . J PACKAGE 74ACT11086 . . . D OR N PACKAGE Flow-Through Architecture to Optimize PCB Layout TOP VIEW 1A[ 1 Y[
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54ACT11086,
74ACT11086
TI0185â
D3390,
500-mA
300-mil
54ACT11086
ga74ACT11086
74ACT11086
4bti
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Untitled
Abstract: No abstract text available
Text: 54AC11833, 74AC11833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS T 10165— D 3448, MARCH 1990 High-Speed Bus Transceivers with Parity Generator/Checker 5 4A C 11 8 33 . . . J T P ACKA G E 7 4 A C 11833 . . . D W OR N T P ACKA G E TO P V IE W Parity-Error Flag Open-Draln Output
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OCR Scan
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54AC11833,
74AC11833
500-mA
300-mll
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74ACT11086
Abstract: MIK 494 T-43-21 TTO185 D3330
Text: TEXAS INSTR LOGIC 31E D 0^1723 QGÔÔ534 3 54ACT11086, 74ACT11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES T 'Ì 3 'Z 4 ~ o O N O VEM B ER 1989 T O 185— D 3390, NOVEI* • Inputs are TTL-Voltage Compatible 54ACT11086 . . . J PACKAGE 74ACT11086 . . . D OR N PACKAGE
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OCR Scan
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PDF
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54ACT11086,
74ACT11086
TTO185â
D3390,
500-mA
300-mil
T-43-21
TI0165
MIK 494
TTO185
D3330
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