SM-1994
Abstract: HY62UF16101C
Text: HY62UF16101C Series 64Kx16bit full CMOS SRAM Document Title 64K x16 bit 3.0V Super Low Power Full CMOS Slow SRAM Revision History Revision No History Draft Date Remark 03 Divide output load into two factors - tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW - Others
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Original
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HY62UF16101C
64Kx16bit
100ns
HYUF611Cc
100ns
SM-1994
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PDF
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Untitled
Abstract: No abstract text available
Text: HY62UF16101C Series 64Kx16bit full CMOS SRAM Document Title 64K x16 bit 3.0V Super Low Power Full CMOS Slow SRAM Revision History Revision No History Draft Date Remark 03 Divide output load into two factors - tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW - Others
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Original
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HY62UF16101C
64Kx16bit
100ns
HYUF611Cc
100ns
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PDF
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X16-BIT
Abstract: 64K SRAM
Text: H Y 6 2U F 1 610 1C S eries 64K x16bit full CMOS SRAM DESCRIPTION FEATURES The HY62UF16101C is a high speed, super low power and 1M bit full CMOS SRAM organized as 65,536 words by 16bit. The HY62UF16101C uses high performance full CMOS process technology and designed for high speed low power circuit
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OCR Scan
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HY62UF16101C
x16bit
16bit.
HYUF611CC
100ns
X16-BIT
64K SRAM
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PDF
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